LMH6601_14 Datasheet, PDF (3/37 Pages) National Semiconductor (TI) – LMH6601/LMH6601Q 250 MHz, 2.4V CMOS Operational Amplifier with Shutdown

LMH6601, LMH6601-Q1
www.ti.com
SNOSAK9E – JUNE 2006 – REVISED MARCH 2013
5V ELECTRICAL CHARACTERISTICS
Single Supply with V_S= 5V, A_V = +2, R_F = 604Ω, SD tied to V⁺, V_OUT = V_S/2, R_L = 150Ω to V^− unless otherwise specified.
Boldface limits apply at temperature extremes. ⁽¹⁾
Symbol
Parameter
Condition
Min ⁽²⁾
Typ ⁽²⁾ Max ⁽²⁾
Units
Frequency Domain Response
SSBW
SSBW_1
Peak
Peak_1
LSBW
Peak_2
0.1 dB BW
GBWP_1k
GBWP_150
A_VOL
PBW
–3 dB Bandwidth Small Signal
Peaking
Peaking
–3 dB Bandwidth Large Signal
Peaking
0.1 dB Bandwidth
Gain Bandwidth Product
Large Signal Open Loop Gain
Full Power BW
DG
Differential Gain
DP
Differential Phase
Time Domain Response
V_OUT = 0.25 V_PP
V_OUT = 0.25 V_PP, A_V = +1
V_OUT = 0.25 V_PP, A_V = +1
V_OUT = 0.25 V_PP
V_OUT = 2 V_PP
V_OUT = 2 V_PP
V_OUT = 2 V_PP
Unity Gain, R_L = 1 kΩ to V_S/2
Unity Gain, R_L = 150Ω to V_S/2
0.5V < V_OUT < 4.5V
–1 dB, A_V = +4, V_OUT = 4.2 V_PP,
R_L = 150Ω to V_S/2
4.43 MHz, 1.7V ≤ V_OUT ≤ 3.3V,
R_L = 150Ω to V^−
4.43 MHz, 1.7V ≤ V_OUT ≤ 3.3V
R_L = 150Ω to V^−
130
250
2.5
0
81
0
30
155
125
56
66
30
0.06
0.10
MHz
dB
dB
MHz
dB
MHz
MHz
dB
MHz
%
deg
TRS/TRL
Rise & Fall Time
0.25V Step
2.6
ns
OS
Overshoot
0.25V Step
10
%
SR
Slew Rate
2V Step
275
V/μs
T_S
T_{S_1}
PD
Settling Time
Propagation Delay
1V Step, ±0.1%
1V Step, ±0.02%
Input to Output, 250 mV Step, 50%
50
ns
220
2.4
ns
C_L
Cap Load Tolerance
A_V = −1, 10% Overshoot, 75Ω in Series
50
pF
Distortion & Noise Performance
HD2
HD2_1
HD3
HD3_1
Harmonic Distortion (2^nd)
Harmonic Distortion (3^rd)
2 V_PP, 10 MHz
4 V_PP, 10 MHz, R_L = 1 kΩ to V_S/2
2 V_PP, 10 MHz
4 V_PP, 10 MHz, R_L = 1 kΩ to V_S/2
−56
dBc
−61
−73
dBc
−64
THD
Total Harmonic Distortion
4 V_PP, 10 MHz, R_L = 1 kΩ to V_S/2
−58
V_N1
Input Voltage Noise
V_N2
>10 MHz
1 MHz
7
nV/√Hz
10
I_N
Input Current Noise
>1 MHz
50
fA/√Hz
Static, DC Performance
V_IO
DV_IO
I_B
I_OS
Input Offset Voltage
Input Offset Voltage Average Drift ⁽³⁾
Input Bias Current
(4)
Input Offset Current
(4)
±1
±2.4
mV
±5.0
−5
μV/°C
5
50
pA
2
25
pA
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that T_J = T_A. No specification of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where T_J > T_A.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(3) Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.
(4) This parameter is ensured by design and/or characterization and is not tested in production.
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