COP87L88CL Datasheet, PDF (23/34 Pages) National Semiconductor (TI) – 8-Bit One-Time Programmable OTP Microcontroller

Instruction Set (Continued)
INSTRUCTION SET
ADD
ADC
A Meml
A Meml
ADD
ADD with Carry
SUBC
A Meml
Subtract with Carry
AND
ANDSZ
OR
XOR
IFEQ
IFEQ
IFNE
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
RPND
X
X
LD
LD
LD
LD
LD
X
X
LD
LD
LD
CLR
INC
DEC
LAID
DCOR
RRC
RLC
SWAP
SC
RC
IFC
IFNC
POP
PUSH
VIS
JMPL
JMP
JP
JSRL
JSR
JID
RET
RETSK
RETI
INTR
NOP
A Meml
A Imm
A Meml
A Meml
MD Imm
A Meml
A Meml
A Meml
Reg
Mem
Mem
Mem
A Mem
AX
A Meml
AX
B Imm
Mem Imm
Reg Imm
A Bg
A Xg
A Bg
A Xg
Bg Imm
A
A
A
A
A
A
A
A
A
Addr
Addr
Disp
Addr
Addr
Logical AND
Logical AND Immed Skip if Zero
Logical OR
Logical EXclusive OR
IF EQual
IF EQual
IF Not Equal
IF Greater Than
If B Not Equal
Decrement Reg Skip if Zero
Set BIT
Reset BIT
IF BIT
Reset PeNDing Flag
EXchange A with Memory
EXchange A with Memory X
LoaD A with Memory
LoaD A with Memory X
LoaD B with Immed
LoaD Memory Immed
LoaD Register Memory Immed
EXchange A with Memory B
EXchange A with Memory X
LoaD A with Memory B
LoaD A with Memory X
LoaD Memory B Immed
CLeaR A
INCrement A
DECrementA
Load A InDirect from ROM
Decimal CORrect A
Rotate A Right thru C
Rotate A Left thru C
SWAP nibbles of A
Set C
Reset C
IF C
IF Not C
POP the stack into A
PUSH A onto the stack
Vector to Interrupt Service Routine
Jump absolute Long
Jump absolute
Jump relative short
Jump SubRoutine Long
Jump SubRoutine
Jump InDirect
RETurn from subroutine
RETurn and SKip
RETurn from Interrupt
Generate an Interrupt
No OPeration
w A A a Meml
w w A A a Meml a C C Carry
w HC Half Carry
w w A A b MemI a C C Carry
w HC Half Carry
w A A and Meml
Skip next if (A and Imm) e 0
w A A or Meml
w A A xor Meml
Compare MD and Imm Do next if MD e Imm
Compare A and Meml Do next if A e Meml
Compare A and Meml Do next if A ⁱ Meml
Compare A and Meml Do next if A ^l Meml
Do next if lower 4 bits of B ⁱ Imm
w Reg Regb 1 Skip if Reg e 0
1 to bit Mem (bit e 0 to 7 immediate)
0 to bit Mem
If bit in A or Mem is true do next instruction
Reset Software Interrupt Pending Flag
A
Mem
A
X
AwMeml
Aw X
BwImm
MemwImm
RegwImm
A
w B (B Bg1)
A
w X (X g1)
Aw B w (B Bg1)
Aw X w (X Xg1)
B wImm (Bw g1)
Aw0
AwA a 1
AwA b 1
w A ROM (PU A)
w A BCD correction of A (follows ADC SUBC)
C
A7
A0
C
CwA7 w w A0wC
A7 A4
A3 A0
Cw1 HCw1
Cw0 HCw0
IF C is true do next instruction
If C is not true do next instruction
SPwSP a 1 Aw SP
SP wA SPw SP b 1
PUw VU PL w VL
w PC ii (ii e 15 bits 0 to 32k)
w PC9 0 i (i e 12 bits)
w PC PC a r (r is b31 to a32 except 1)
SP wPL w w SPb1 PU SPb2 PC ii
w w SP PL SPb1
PU SPb2 PC9
0wi
w PL ROM (PU A)
w w SPa2 PL SP PU SPb1
w w SPa2 PL SP PU SPb1
SPa2 PLw SP PUw SPb1 GIEw1
SP wPL w w SPb1 PU SPb2 PC 0FF
PCwPCa1
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