COP87L88CL Datasheet, PDF (18/34 Pages) National Semiconductor (TI) – 8-Bit One-Time Programmable OTP Microcontroller

WATCHDOG Operation (Continued)
TABLE V WATCHDOG Service Actions
Key
Data
Match
Don’t Care
Mismatch
Don’t Care
Window
Data
Match
Mismatch
Don’t Care
Don’t Care
Clock
Monitor
Match
Don’t Care
Don’t Care
Mismatch
Action
Valid Service Restart Service Window
Error Generate WATCHDOG Output
Error Generate WATCHDOG Output
Error Generate WATCHDOG Output
TABLE VI MICROWIRE PLUS
Master Mode Clock Select
SL1
SL0
SK
0
0
2 c t_c
0
1
4 c t_c
1
x
8 c t_c
Where t_c is the instruction cycle clock
The CLOCK MONITOR forces the G1 pin low upon detect-
ing a clock frequency error The CLOCK MONITOR error
will continue until the clock frequency has reached the mini-
mum specified value after which the G1 output will enter
the high impedance TRI-STATE mode following 16 t_c – 32 t_c
clock cycles The CLOCK MONITOR generates a continual
CLOCK MONITOR error if the oscillator fails to start or fails
to reach the minimum specified frequency The specification
for the CLOCK MONITOR is as follows
1 t_c ^l 10 kHz No clock rejection
1 t_c ^k 10 Hz Guaranteed clock rejection
WATCHDOG AND CLOCK MONITOR SUMMARY
The following salient points regarding the WATCHDOG and
CLOCK MONITOR should be noted
 Both WATCHDOG and CLOCK MONITOR detector cir-
cuits are inhibited during RESET
 Following RESET the WATCHDOG and CLOCK MONI-
TOR are both enabled with the WATCHDOG having the
maximum service window selected
 The WATCHDOG service window and CLOCK MONI-
TOR enable disable option can only be changed once
during the initial WATCHDOG service following RESET
 The initial WATCHDOG service must match the key data
value in the WATCHDOG Service register WDSVR in or-
der to avoid a WATCHDOG error
 Subsequent WATCHDOG services must match all three
data fields in WDSVR in order to avoid WATCHDOG er-
rors
 The correct key data value cannot be read from the
WATCHDOG Service register WDSVR Any attempt to
read this key data value of 01100 from WDSVR will read
as key data value of all 0’s
 The WATCHDOG detector circuit is inhibited during both
the HALT and IDLE modes
 The CLOCK MONITOR detector circuit is active during
both the HALT and IDLE modes Consequently the de-
vice inadvertently entering the HALT mode will be detect-
ed as a CLOCK MONITOR error (provided that the
CLOCK MONITOR enable option has been selected by
the program)
 With the single-pin R C oscillator mask option selected
and the CLKDLY bit reset the WATCHDOG service win-
dow will resume following HALT mode from where it left
off before entering the HALT mode
 With the crystal oscillator mask option selected or with
the single-pin R C oscillator mask option selected and
the CLKDLY bit set the WATCHDOG service window will
be set to its selected value from WDSVR following HALT
Consequently the WATCHDOG should not be serviced
for at least 2048 instruction cycles following HALT but
must be serviced within the selected window to avoid a
WATCHDOG error
 The IDLE timer T0 is not initialized with RESET
 The user can sync in to the IDLE counter cycle with an
IDLE counter (T0) interrupt or by monitoring the T0PND
flag The T0PND flag is set whenever the thirteenth bit of
the IDLE counter toggles (every 4096 instruction cycles)
The user is responsible for resetting the T0PND flag
 A hardware WATCHDOG service occurs just as the de-
vice exits the IDLE mode Consequently the
WATCHDOG should not be serviced for at least 2048
instruction cycles following IDLE but must be serviced
within the selected window to avoid a WATCHDOG error
 Following RESET the initial WATCHDOG service (where
the service window and the Clock Monitor enable dis-
able must be selected) may be programmed anywhere
within the maximum service window (65 536 instruction
cycles) initialized by RESET Note that this initial
WATCHDOG service may be programmed within the ini-
tial 2048 instruction cycles without causing a
WATCHDOG error
Detection of Illegal Conditions
The device can detect various illegal conditions resulting
from coding errors transient noise power supply voltage
drops runaway programs etc
Reading of undefined ROM gets zeros The opcode for soft-
ware interrupt is zero If the program fetches instructions
from undefined ROM this will force a software interrupt
thus signaling that an illegal condition has occurred
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