LMH0031 Datasheet, PDF (19/31 Pages) National Semiconductor (TI) – SMPTE 292M/259M Digital Video Deserializer Descrambler with Video and Ancillary Data FIFOs

Device Operation (Continued)
TABLE 2. Control Register Bit Assignments (Continued)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
ANC 6 (register address 18h)
ANC FIFO
90% FULL
SHORT MSG
DETECT
ANC PARITY
MASK
reserved
reserved
reserved
FORMAT 0 (register address 0Bh)
FRAMING
MODE
SD ONLY
HD ONLY
FORMAT
SET(4)
FORMAT
SET(3)
FORMAT
SET(2)
FORMAT 1 (register address 0Ch)
F
V
H
FORMAT(4) FORMAT(3) FORMAT(2)
TEST 0 (register address 0Dh)
TEST
TEST
TEST
TEST
PASS/FAIL TPG ENABLE
PATTERN
SELECT(5)
PATTERN
SELECT(4)
PATTERN
SELECT(3)
PATTERN
SELECT(2)
VIDEO INFO 0 (register address 0Eh)
VERT.
DE-DITHER
VPG FILTER
LOCK
DE-DITHER
EAV
SAV
ENABLE
ENABLE
DETECT
ENABLE
VIDEO CONTROL 0 (register address 55h)
reserved
EXTERNAL
V_CLK
SYNC DETECT
ENABLE
REFERENCE CLOCK (register address 67h)
LSB CLIP
ENABLE
reserved
NRZI
ENABLE
reserved
reserved
reserved
reserved
reserved INT_OSC EN
MULTI-FUNCTION I/O BUS PIN CONFIGURATION
I/O PIN 0 CONFIG (register address 0Fh)
reserved
reserved
PIN 0 SEL[5] PIN 0 SEL[4] PIN 0 SEL[3] PIN 0 SEL[2]
I/O PIN 1 CONFIG (register address 10h)
reserved
reserved
PIN 1 SEL[5] PIN 1 SEL[4] PIN 1 SEL[3] PIN 1 SEL[2]
I/O PIN 2 CONFIG (register address 11h)
reserved
reserved
PIN 2 SEL[5] PIN 2 SEL[4] PIN 2 SEL[3] PIN 2 SEL[2]
I/O PIN 3 CONFIG (register address 12h)
reserved
reserved
PIN 3 SEL[5] PIN 3 SEL[4] PIN 3 SEL[3] PIN 3 SEL[2]
I/O PIN 4 CONFIG (register address 13h)
reserved
reserved
PIN 4 SEL[5] PIN 4 SEL[4] PIN 4 SEL[3] PIN 4 SEL[2]
I/P PIN 5 CONFIG (register address 14h)
reserved
reserved
PIN 5 SEL[5] PIN 5 SEL[4] PIN 5 SEL[3] PIN 5 SEL[2]
I/O PIN 6 CONFIG (register address 15h)
reserved
reserved
PIN 6 SEL[5] PIN 6 SEL[4] PIN 6 SEL[3] PIN 6 SEL[2]
I/O PIN 7 CONFIG (register address 16h)
reserved
reserved
PIN 7 SEL[5] PIN 7 SEL[4] PIN 7 SEL[3] PIN 7 SEL[2]
Bit 1
reserved
FORMAT
SET(1)
FORMAT(1)
TEST
PATTERN
SELECT(1)
NSP
DE-Scramble
ENABLE
CLK EN
PIN 0 SEL[1]
PIN 1 SEL[1]
PIN 2 SEL[1]
PIN 3 SEL[1]
PIN 4 SEL[1]
PIN 5 SEL[1]
PIN 6 SEL[1]
PIN 7 SEL[1]
Bit 0
VANC
FORMAT
SET(0)
FORMAT(0)
TEST
PATTERN
SELECT(0)
FRAMING
ENABLE
reserved
reserved
PIN 0 SEL[0]
PIN 1 SEL[0]
PIN 2 SEL[0]
PIN 3 SEL[0]
PIN 4 SEL[0]
PIN 5 SEL[0]
PIN 6 SEL[0]
PIN 7 SEL[0]
19
www.national.com