COPCH942C Datasheet, PDF (17/26 Pages) National Semiconductor (TI) – 8-Bit CMOS ROM Based Microcontrollers with 1k or 2k

Functional Description (Continued)
DS009103-15
FIGURE 8. Timer/Counter Auto
Reload Mode Block Diagram
DS009103-14
FIGURE 9. Timer Capture Mode Block Diagram
TIMER PWM APPLICATION
Figure 10 shows how a minimal component D/A converter
can be built out of the Timer-Register pair in the Auto-Reload
mode. The timer is placed in the “Timer with auto reload”
mode and the TIO pin is selected as the timer output. At the
outset the TIO pin is set high, the timer T1 holds the on time
and the register R1 holds the signal off time. Setting TRUN
bit starts the timer which counts down at the instruction cycle
rate. The underflow toggles the TIO output and copies the off
time into the timer, which continues to run. By alternately
loading in the on time and the off time at each successive in-
terrupt a PWM frequency can be easily generated.
DS009103-16
FIGURE 10. Timer Application
Control Registers
CNTRL REGISTER (ADDRESS X’00EE)
The Timer and MICROWIRE/PLUS control register contains
the following bits:
SL1 & SL0 Select the MICROWIRE/PLUS clock divide-by
IEDG
External interrupt edge polarity select
(0 = rising edge, 1 = falling edge)
MSEL
Enable MICROWIRE/PLUS functions SO and
SK
TRUN
Start/Stop the Timer/Counter (1 = run, 0 = stop)
TC3
Timer input edge polarity select (0 = rising
edge, 1 = falling edge)
TC2
Selects the capture mode
TC1
Selects the timer mode
TC1 TC2 TC3 TRUN MSEL IEDG SL1 SL0
Bit 7
Bit 0
PSW REGISTER (ADDRESS X’00EF)
The PSW register contains the following select bits:
GIE Global interrupt enable
ENI External interrupt enable
BUSY MICROWIRE/PLUS busy shifting
IPND External interrupt pending
ENTI Timer interrupt enable
TPND Timer interrupt pending
C
Carry Flag
HC Half carry Flag
HC C TPND ENTI IPND BUSY ENI GIE
Bit 7
Bit 0
Addressing Modes
REGISTER INDIRECT
This is the “normal” mode of addressing. The operand is the
memory addressed by the B register or X register.
DIRECT
The instruction contains an 8-bit address field that directly
points to the data memory for the operand.
IMMEDIATE
The instruction contains an 8-bit immediate field as the oper-
and.
REGISTER INDIRECT
(AUTO INCREMENT AND DECREMENT)
This is a register indirect mode that automatically increments
or decrements the B or X register after executing the instruc-
tion.
RELATIVE
This mode is used for the JP instruction, the instruction field
is added to the program counter to get the new program lo-
cation. JP has a range of from −31 to +32 to allow a one byte
relative jump (JP + 1 is implemented by a NOP instruction).
There are no ’pages’ when using JP, all 15 bits of PC are
used.
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