COP224C Datasheet, PDF (16/24 Pages) National Semiconductor (TI) – Single-Chip 1k and 2k CMOS Microcontrollers

Power Dissipation (Continued)
If an IT instruction is executed the chip goes into the IDLE
mode until the timer overflows In IDLE mode the current
drain can be calculated from the following equation
IcieI_QaVc70cFi
For example at 5 volts V_CC and 400 kHz
Icie120a5c70c0 4e260 mA
The total average current will then be the weighted average
of the operating current and the idle current
To
Ti
Ita e I_CO c _ToaTi a Ici c _ToaTi
where
Itaetotal average current
I_COeoperating current
Icieidle current
Toeoperating time
Tieidle time
I O OPTIONS
Outputs have the following optional configurations illustrat-
ed in Figure 8
a Standard A CMOS push-pull buffer with an N-channel
device to ground in conjunction with a P-channel device
to V_CC compatible with CMOS and LSTTL
b Open Drain An N-channel device to ground only al-
lowing external pull-up as required by the user’s applica-
tion
c Standard TRI-STATE L Output A CMOS output buffer
similar to a which may be disabled by program control
d Open-Drain TRI-STATE L Output This has the N-chan-
nel device to ground only
All inputs have the following option
e Hi-Z input which must be driven by the users logic
All output drivers use two common devices numbered 1 to
2 Minimum and maximum current (I_OUT and V_OUT) curves
are given in Figure 9 for each of these devices to allow the
designer to effectively use these I O configurations
a Standard Push-Pull Output
b Open-Drain Output
c Standard TRI-STATE ‘‘L’’ Output
d Open Drain TRI-STATE
‘‘L’’ Output
FIGURE 8 Input Output Configurations
TL DD 8422 – 11
e Hi-Z Input
16