English
Language : 

DS92LV2421 Datasheet, PDF (1/40 Pages) National Semiconductor (TI) – 10 to 75 MHz, 24-bit Channel Link II Serializer and Deserializer
DS92LV2421/DS92LV2422
PRELIMINARY
May 25, 2010
10 to 75 MHz, 24-bit Channel Link II Serializer and
Deserializer
General Description
The DS92LV2421 (Serializer) / DS92LV2422 (Deserializer)
chipset translates a parallel 24–bit LVCMOS data interface
into a single high-speed CML serial interface with embedded
clock information. This single serial stream eliminates skew
issues between clock and data, reduces connector size and
interconnect cost for transferring a 24-bit or less, bus over
FR-4 printed circuit board backplanes, balanced cables, and
optical fiber.
In addition to the 24-bit data bus interface, the DS92LV2421
and DS92LV2422 also features a 3-bit control bus for slow
speed signals. This allows implementing video and display
applications with up to 24–bits per pixel (RGB), or embedding
audio information with compressed video formats.
Programmable transmit de-emphasis, receive equalization,
on-chip scrambling and DC balancing enables longer dis-
tance transmission over lossy cables and backplanes. The
DS92LV2422 automatically locks to incoming data without an
external reference clock or special sync patterns, providing
easy “plug-and-go” operation. EMI is minimized by the use of
low voltage differential signaling, receiver drive strength con-
trol, and spread spectrum clocking capability.
The DS92LV2421, DS92LV2422 chipset is programmable
though an I2C interface as well as through pins. A built-in AT-
SPEED BIST feature validates link integrity and may be used
for system diagnostics.
The DS92LV2421 is offered in a 48-pin LLP and the
DS92LV2422 is offered in a 60-pin LLP package. Both de-
vices operate over the full industrial temperature range of -40°
C to +85°C.
Features
■ 24–bit data, 3–bit control, 10 – 75 MHz clock
■ AC coupled STP interconnect cable up to 10 meters
■ Integrated terminations on Ser and Des
■ AT-SPEED link BIST mode and reporting pin
■ Optional I2C compatible Serial Control Bus
■ Power down mode minimizes power dissipation
■ 1.8V or 3.3V compatible LVCMOS I/O interface
■ -40° to +85°C temperature range
■ >8 kV HBM
SERIALIZER — DS92LV2421
■ Data scrambler for reduced EMI
■ DC-balance encoder for AC coupling
■ Selectable output VOD and adjustable de-emphasis
DESERIALIZER — DS92LV2422
■ FAST random data lock; no reference clock required
■ Adjustable input receiver equalization
■ LOCK (real time link status) reporting pin
■ EMI minimization on output parallel bus (SSCG)
■ Output Slew control (OS)
Applications
■ Embedded Video and Display
■ Medical Imaging
■ Factory Automation
■ Office Automation — Printer, Scanner
■ Security and Video Surveillance
■ General purpose data communication
Applications Diagram
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2010 National Semiconductor Corporation 301101
30110127
www.national.com