UPD30102 Datasheet, PDF (498/701 Pages) NEC – 64/32-bit Microprocessor

CHAPTER 26 FIR (FAST IrDA INTERFACE UNIT)
26.2 REGISTER SET
The FIR registers are listed below.
Table 26-1. FIR Registers
Address
0x0C00 0040
0x0C00 0042
0x0C00 0044
0x0C00 0050
0x0C00 0052
0x0C00 0054
0x0C00 0056
0x0C00 0058
0x0C00 005C
0x0C00 005E
0x0C00 0060
0x0C00 0062
0x0C00 0064
0x0C00 0066
0x0C00 0068
0x0C00 006A
0x0C00 006C
0x0C00 006E
0x0C00 0070
0x0C00 0074
R/W
Register symbols
R/W
FRSTR
R/W
DPINTR
R/W
DPCNTR
W
TDR
R
RDR
R/W
IMR
R/W
FSR
R/W
IRSR1
R/W
CRCSR
R/W
FIRCR
R/W
MIRCR
R/W
DMACR
R/W
DMAER
R
TXIR
R
RXIR
R
IFR
R
RXSTS
R/W
TXFL
R/W
MRXF
R
RXFL
Function
FIR Reset register
DMA Page Interrupt register
DMA Control register
Transmit Data register
Receive Data register
Interrupt Mask register
FIFO Setup register
Infrared Setup register 1
CRC Setup register
FIR Control register
MIR Control register
DMA Control register
DMA Enable register
Transmit Indication register
Receive Indication register
Interrupt Flag register
Receive Status register
Transmit Frame Length
Maximum Receive Frame Length
Receive Frame Length register
These registers are described in detail below.
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