UPD30102 Datasheet, PDF (375/701 Pages) NEC – 64/32-bit Microprocessor

CHAPTER 18 GIU (GENERAL PURPOSE I/O UNIT)
18.2.13 GIUINTHTSELL (0x0B00 0118)
Bit
Name
R/W
RTCRST
Other resets
D15
INTH[15]
R/W
0
0
D14
INTH[14]
R/W
0
0
D13
INTH[13]
R/W
0
0
D12
INTH[12]
R/W
0
0
D11
INTH[11]
R/W
0
0
D10
INTH[10]
R/W
0
0
D9
INTH[9]
R/W
0
0
D8
INTH[8]
R/W
0
0
Bit
Name
R/W
RTCRST
Other resets
D7
INTH[7]
R/W
0
0
D6
INTH[6]
R/W
0
0
D5
INTH[5]
R/W
0
0
D4
INTH[4]
R/W
0
0
D3
INTH[3]
R/W
0
0
D2
INTH[2]
R/W
0
0
D1
INTH[1]
R/W
0
0
D0
INTH[0]
R/W
0
0
Bit
D[15..0]
Name
INTH[15..0]
Function
GPIO pin interrupt signal hold/through
1 : Hold
0 : Through
This register is used to set whether or not interrupt signals to the GPIO pins should be held. The INTH[15..0] bits
correspond to the GPIO[15..0] pins.
When “1” is set to the corresponding INTH bit, any interrupt signal input to the corresponding GPIO pin is held.
When “0” is set to this bit, any interrupt signal input to the corresponding GPIO pin is not held and is instead
allowed to pass through.
Any held interrupt signal is cleared when “1” is set to the corresponding bit in the GIUINTSTATL register (GPIO
Interrupt Status Register).
INTH[15..0] are not affected by GIUINTENL (interrupt enable register).
If “1” (hold) is set to the INTH bit while the interrupt enable bit is set to prohibit interrupts, any change in the pin
state is retained as change data. Therefore, an interrupt still occurs when the interrupt enable bit is again set to
enable interrupts.
Caution The function of GPIO[15] is fixed as DCD# signal input.
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