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UPD789304 Datasheet, PDF (47/64 Pages) NEC – 8-BIT SINGLE-CHIP MICROCONTROLLER
µPD789304, 789306, 789314, 789316
(2) Serial interface 10, 20 (SIO10, SIO20) (TA = –40 to +85°C, VDD = 1.8 to 5.5 V)
(a) 3-wire serial I/O mode (internal clock output)
Parameter
Symbol
Conditions
MIN. TYP. MAX.
Unit
SCKn0 cycle time
tKCY1
VDD = 2.7 to 5.5 V
800
ns
3200
ns
SCKn0 high-/low-level
tKH1,
width
tKL1
VDD = 2.7 to 5.5 V
tKCY1/2–50
ns
tKCY1/2–150
ns
SIn0 setup time
(to SCKn0↑)
tSIK1
VDD = 2.7 to 5.5 V
150
ns
500
ns
SIn0 hold time
tSI1
VDD = 2.7 to 5.5 V
400
(from SCKn0↑)
600
Delay time from SCKn0↓ tSO1
R = 1 kΩ, C = 100 pFNote VDD = 2.7 to 5.5 V
0
to SOn0 output
0
ns
ns
250
ns
1000
ns
Note R and C are the load resistance and load capacitance of the SOn0 output lines.
Remark n = 1, 2
(b) 3-wire serial I/O mode (external clock input)
Parameter
Symbol
Conditions
MIN. TYP. MAX.
Unit
SCKn0 cycle time
tKCY2
VDD = 2.7 to 5.5 V
800
ns
3200
ns
SCKn0 high-/low-level
tKH2,
width
tKL2
VDD = 2.7 to 5.5 V
400
ns
1600
ns
SIn0 setup time
(to SCKn0↑)
tSIK2
VDD = 2.7 to 5.5 V
100
ns
150
ns
SIn0 hold time
tSI2
VDD = 2.7 to 5.5 V
400
(from SCKn0↑)
600
Delay time from SCKn0↓ tSO2
R = 1 kΩ, C = 100 pFNote VDD = 2.7 to 5.5 V
0
to SOn0 output
0
ns
ns
300
ns
1000
ns
Note R and C are the load resistance and load capacitance of the SOn0 output lines.
Remark n = 1, 2
Data Sheet U14384EJ1V0DS
47