UPD789304 Datasheet, PDF (34/64 Pages) NEC – 8-BIT SINGLE-CHIP MICROCONTROLLER

µPD789304, 789306, 789314, 789316
Mnemonic
Operand
OR
XOR
CMP
ADDW
SUBW
CMPW
INC
DEC
INCW
DECW
ROR
ROL
RORC
ROLC
A, #byte
saddr, #byte
A, r
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, #byte
saddr, #byte
A, r
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, #byte
saddr, #byte
A, r
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
AX, #word
AX, #word
AX, #word
r
saddr
r
saddr
rp
rp
A, 1
A, 1
A, 1
A, 1
Bytes Clocks
Operation
2
4
A ← A ∨ byte
3
6
(saddr) ← (saddr) ∨ byte
2
4
A←A∨r
2
4
A ← A ∨ (saddr)
3
8
A ← A ∨ (addr16)
1
6
A ← A ∨ (HL)
2
6
A ← A ∨ (HL + byte)
2
4
A ← A ∨ byte
3
6
(saddr) ← (saddr) ∨ byte
2
4
A←A∨r
2
4
A ← A ∨ (saddr)
3
8
A ← A ∨ (addr16)
1
6
A ← A ∨ (HL)
2
6
A ← A ∨ (HL + byte)
2
4
A – byte
3
6
(saddr) – byte
2
4
A–r
2
4
A – (saddr)
3
8
A – (addr16)
1
6
A – (HL)
2
6
A – (HL + byte)
3
6
AX, CY ← AX + word
3
6
AX, CY ← AX – word
3
6
AX – word
2
4
r←r+1
2
4
(saddr) ← (saddr) + 1
2
4
r←r–1
2
4
(saddr) ← (saddr) – 1
1
4
rp ← rp + 1
1
4
rp ← rp – 1
1
2
(CY, A7 ← A0, Am – 1 ← Am) × 1 time
1
2
(CY, A0 ← A7, Am + 1 ← Am) × 1 time
1
2
(CY ← A0, A7 ← CY, Am – 1 ← Am) × 1 time
1
2
(CY ← A7, A0 ← CY, Am + 1 ← Am) × 1 time
Flags
Z AC CY
×
×
×
×
×
×
×
×
×
×
×
×
×
×
× ××
× ××
× ××
× ××
× ××
× ××
× ××
× ××
× ××
× ××
××
××
××
××
×
×
×
×
Remark One instruction clock cycle is one CPU clock cycle (fCPU) selected via the processor clock control
register (PCC).
34
Data Sheet U14384EJ1V0DS