UPD780204 Datasheet, PDF (342/418 Pages) NEC – 8-Bit Single-Chip Microcontrollers

CHAPTER 16 INTERRUPT AND TEST FUNCTIONS
(3) Priority specification flag registers (PR0L, PR0H)
The priority specification flag is used to set the corresponding maskable interrupt priority order.
PR0L and PR0H are set with a 1-bit or 8-bit memory manipulation instruction. If PR0L and PR0H are used
as a 16-bit register PR0, use a 16-bit memory manipulation instruction for setting.
RESET input sets these registers to FFH.
Figure 16-4. Format of Priority Specification Flag Register
Symbol <7> <6> <5> <4> <3> <2> <1> <0>
PR0L TMPR3 CSIPR1 CSIPR0 PPR3 PPR2 PPR1 PPR0 TMPR4
Address
FFE8H
After reset R/W
FFH
R/W
7
6
5 <4> <3> <2> <1> <0>
PR0H 1
1
1 KSPR ADPR TMPR2 TMPR1 TMPR0
FFE9H
FFH
R/W
xxPR Priority level selection
0 High priority level
1 Low priority level
Cautions 1. When the watchdog timer is used in watchdog timer mode 1, set the TMPR4 flag to 1.
2. Always set bits 5 to 7 of PR0H to 1.
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User’s Manual U11302EJ4V0UM