UPD780204 Datasheet, PDF (232/418 Pages) NEC – 8-Bit Single-Chip Microcontrollers

CHAPTER 13 SERIAL INTERFACE CHANNEL 0
(a) Serial operating mode register 0 (CSIM0)
CSIM0 is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets CSIM0 to 00H.
Symbol
<7> <6> <5> 4 3 2 1 0
CSIM0
CSIE0
COI
WUP
CSIM
04
CSIM
03
CSIM
02
CSIM
01
CSIM
00
Address After reset
FF60H
00H
R/W
R/W^{Note 1}
R/W CSIM CSIM
Serial interface channel 0 clock selection
01 00
0 × Input clock to SCK0 pin from off-chip
1 0 8-bit timer register 2 (TM2) output
1 1 Clock specified with bits 0 to 3 of timer clock select register 3 (TCL3)
R/W CSIM CSIM CSIM
Operating
04 03 02 ^{PM25 P25 PM26 P26 PM27 P27}
mode
Start
bit
SI0/P25
pin function
SO0/P26
pin function
SCK0/P27
pin function
0 × 3-wire serial I/O mode (refer to 13.4.2 3-wire serial I/O mode operation)
Note 2 Note 2
SBI mode
0××0001
10
Note 2 Note 2
100××01
MSB
P25
(CMOS I/O)
SB1
(N-ch open-drain
I/O)
SCK0
(CMOS I/O)
SB0
(N-ch open-drain
I/O)
P26
(CMOS I/O)
1 1 2-wire serial I/O mode (refer to 13.4.4 2-wire serial I/O mode operation)
R/W WUP Wakeup function control^{Note 3}
0 Interrupt request signal generation with each serial transfer in any mode
Interrupt request signal generation when the address received after bus release (when CMDD = RELD = 1) matches the
1
slave address register (SVA) in SBI mode
R COI Slave address comparison result flag^{Note 4}
0 Slave address register (SVA) not equal to serial I/O shift register 0 (SIO0) data
1 Slave address register (SVA) equal to serial I/O shift register 0 (SIO0) data
R/W CSIE0 Serial interface channel 0 operation control
0 Operation stopped
1 Operation enabled
Notes 1. Bit 6 (COI) is a read-only bit.
2. Can be used freely as port function.
3. To use the wakeup function (WUP = 1), clear bit 5 (SIC) of the interrupt timing specification
register (SINT) to 0.
4. When CSIE0 = 0, COI becomes 0.
Remark ×:
don’t care
PM××: Port mode register
P××: Port output latch
232
User’s Manual U11302EJ4V0UM