MC88LV915T Datasheet, PDF (6/11 Pages) Motorola, Inc – LOW SKEW CMOS PLL CLOCK DRIVER

MC88LV915T
SYNC INPUT
(SYNC[1] or
SYNC[0])
FEEDBACK
INPUT
Applications Information for All Versions
tCYCLE SYNC INPUT
t _PD
Q/2 OUTPUT
tSKEWALL
Q0 – Q4
OUTPUTS
Q5 OUTPUT
tSKEWf
tSKEWr
tSKEWf
tCYCLE _{“Q” OUTPUTS}
tSKEWR
2X_Q OUTPUT
Figure 1. Output/Input Switching Waveforms and Timing Diagrams
(These waveforms represent the hook–up configuration of Figure 2a on page 7)
Timing Notes:
• The MC88LV915T aligns rising edges of the FEEDBACK input and SYNC input, therefore the SYNC input
does not require a 50% duty cycle.
• All skew specs are measured between the VCC/2 crossing point of the appropriate output edges.All skews
are specified as ‘windows’, not as a ± deviation around a center point.
• If a “Q” output is connected to the FEEDBACK input (this situation is not shown), the “Q” output frequency
would match the SYNC input frequency, the 2X_Q output would run at twice the SYNC frequency, and the
Q/2 output would run at half the SYNC frequency.
MOTOROLA
6
TIMING SOLUTIONS
BR1333 — Rev 6