HC05 Datasheet, PDF (157/232 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit

Table 11-7 Instruction set (Continued)
Mnemonic
COM
CPX
DEC
EOR
INC
JMP
JSR
LDA
LDX
LSL
LSR
MUL
NEG
NOP
ORA
ROL
ROR
RSP
RTI
RTS
SBC
SEC
SEI
STA
STOP
STX
SUB
SWI
TAX
TST
TXA
WAIT
Addressing modes
INH IMM DIR EXT REL IX IX1
Condition codes
IX2 BSC BTB H I N Z C
• • ◊◊1
• • ◊◊◊
• • ◊◊•
• • ◊◊•
• • ◊◊•
•••••
•••••
• • ◊◊•
• • ◊◊•
• • ◊◊◊
• • 0◊◊
0• • •0
• • ◊◊◊
•••••
• • ◊◊•
• • ◊◊◊
• • ◊◊◊
•••••
?????
•••••
• • ◊◊◊
• • • •1
•1• • •
• • ◊◊•
•0• • •
• • ◊◊•
• • ◊◊◊
•1• • •
•••••
• • ◊◊•
•••••
•0• • •
Address mode abbreviations
BS _{Bit set/clear}
C
BTB Bit test & branch
DIR Direct
EXT Extended
IMM Immediate
IX Indexed (no offset)
IX1 Indexed, 1 byte offset
IX2 Indexed, 2 byte offset
Not implemented
Condition code symbols
H Half carry (from bit 3)
◊
Tested and set if true,
cleared otherwise
I Interrupt mask
• Not affected
N Negate (sign bit)
? Load CCR from stack
Z Zero
0 Cleared
C Carry/borrow
1 Set
11
MC68HC05X16
Rev. 1
CPU CORE AND INSTRUCTION SET
MOTOROLA
11-9