MC68HC68T1 Datasheet, PDF (11/26 Pages) Motorola, Inc – Real-Time Clock plus RAM with Serial Interface

VDD
XTALin
XTALout
INT
IRQ
VDD
VDD
0V
LINE
REAL–TIME CLOCK
MSB
MC68HC68T1 _LSB
1
(STATUS REGISTER)
NOTE: A 60 Hz, 10 V p–p sine–wave voltage is an acceptable signal to present at the LINE input pin.
Figure 8. Power Sensing Functional Diagram
MC68HC05C4
CPU
TO SYSTEM
POWER CONTROL
MSB
1
INTERRUPT
CONTROL
REGISTER
PSE
LSB
CLKOUT
CPUR
VSYS
SERIAL
INTERFACE
REAL–TIME CLOCK
MC68HC68T1
OSC 1
VDD
RESET
VBATT
MISO
MOSI
MC68HC05C4
CPU
Figure 9. Software Power–Down Functional Diagram
MOTOROLA
MC68HC68T1
11