MC68HC68T1 Datasheet, PDF (1/26 Pages) Motorola, Inc – Real-Time Clock plus RAM with Serial Interface

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Real-Time Clock plus RAM with
Serial Interface
CMOS
The MC68HC68T1 HCMOS Clock/RAM peripheral contains a real–time
clock/calendar, a 32 x 8 static RAM, and a synchronous, serial, three–wire
interface for communication with a microcontroller or processor. Operating in a
burst mode, successive Clock/RAM locations can be read or written using only
a single starting address. An on–chip oscillator allows acceptance of a
selectable crystal frequency or the device can be programmed to accept a
50/60 Hz line input frequency.
The LINE and system voltage (VSYS) pins give the MC68HC68T1 the
capability for sensing power–up/power–down conditions, a capability useful for
battery–backup systems. The device has an interrupt output capable of
signaling a microcontroller or processor of an alarm, periodic interrupt, or power
sense condition. An alarm can be set for comparison with the seconds, minutes,
and hours registers. This alarm can be used in conjunction with the power
supply enable (PSE) output to initiate a system power–up sequence if the VSYS
pin is powered to the proper level.
A software power–down sequence can be initiated by setting a bit in the
interrupt control register. This applies a reset to the CPU via the CPUR pin, sets
the clock out (CLKOUT) and PSE pins low, and disables the serial interface.
This condition is held until a rising edge is sensed on the VSYS input pin,
signaling system power coming on, or by activation of a previously enabled
interrupt if the VSYS pin is powered up.
A watchdog circuit can be enabled that requires the microcontroller or
processor to toggle the slave select (SS) pin of the MC68HC68T1 periodically
without performing a serial transfer. If this condition is not met, the CPUR line
resets the CPU.
• Full Clock Features — Seconds, Minutes, Hours (AM/PM), Day–of–Week,
Date, Month, Year (0 – 99), Auto Leap Year
t ^{• 32–Byte General Purpose RAM}
• Direct Interface to Motorola SPI and National MICROWIRE Serial Data
Ports
• Minimum Timekeeping Voltage: 2.2 V
• Burst Mode for Reading/Writing Successive Addresses in Clock/RAM
• Selectable Crystal or 50/60 Hz Line Input Frequency
• Clock Registers Utilize BCD Data
• Buffered Clock Output for Driving CPU Clock, Timer, Colon, or LCD
Backplane
• Power–On Reset with First Time–Up Bit
• Freeze Circuit Eliminates Software Overhead During a Clock Read
• Three Independent Interrupt Modes — Alarm, Periodic, or Power–Down
• CPU Reset Output — Provides Orderly Power–Up/Power–Down
• Watchdog Circuit
• Pin–for–Pin Replacement for CDP68HC68T1
• Chip Complexity: 8500 FETs or 2125 Equivalent Gates
• Also See Application Notes ANE425 “Use of the MC68HC68T1 RTC with
M6805 Microprocessor”, AN457 “Providing a Real–Time Clock for the
MC68302”, and AN1065 “Use of the MC68HC68T1 Real–Time Clock with
Multiple Time Bases”
MICROWIRE is a trademark of National Semiconductor Inc.
REV 2
2/96
©_MOMo_Tto_Oro_Rla,_OIn_Lc._A1996
Order this document
by MC68HC68T1/D
MC68HC68T1
16
1
P SUFFIX
PLASTIC DIP
CASE 648
16
1
DW SUFFIX
SOG PACKAGE
CASE 751G
ORDERING INFORMATION
MC68HC68T1P Plastic DIP
MC68HC68T1DW SOG Package
PIN ASSIGNMENT
CLKOUT 1
CPUR 2
INT 3
SCK 4
MOSI 5
MISO 6
SS 7
VSS 8
16 VDD
15 XTALout
14 XTALin
13 VBATT
12 VSYS
11 LINE
10 POR
9 PSE
MC68HC68T1
1