MV20556 Datasheet, PDF (4/30 Pages) Mosel Vitelic, Corp – 8 - Bit MCU Mouse Controller

MOSEL VITELIC INC.
Preliminary
MV20556
Function Overall
The CPU of MV20556 manipulates versatile operands in
four memory spaces. They are 4 KB program ROM,
128-byte internal Data RAM, 20 SFRs and 16-bit program
counter.
The Internal Data Memory address space is further
divided into the 128-byte Internal Data RAM and 128-byte
Special Function Register (SFR) address spaces shown in
latter Figures. Four Register Banks (each with eight
registers), 128 addressable bits, and the stack reside in
the Internal Data RAM. The stack depth is limited only by
the available Internal Data RAM and its location is
determined by the 8-bit Stack Pointer. All registers except
the Program Counter and the four 8-Register Banks reside
in the Special Function Register address space.
wide. The MV20556 performs operation on bit, nibble,
byte and double-byte data types.
The MV20556 has extensive facilities for byte transfer,
logic, and integer arithmetic operations. It excells at bit
handling since data transfer, logic and conditional branch
operantions can be performed directly on Boolean
variables.
These memory mapped registers include arithmetic
registers, pointers, I/O ports, and registers for the interrupt
system, timers and serial channel. 128 bit locations in the
SFR address space are addressable as bits. The
MV20556 contains 128 bytes of Internal Data RAM and 20
SFRs.
The MV20556 provides a non-paged Program Memory
address space to accommodate relocatable code.
Conditional branches are performed relative to the
Program Counter. The register-indirect jump permits
branching relative to a 16-bit base register with an offset
provided by an 8-bit index register. Sixteen-bit jumps and
calls permit branching to any location in the contiguous 4K
Program Memory address space.
The MV20556 has five methods for addressing source
operands: Register, Direct, Register-Indirect, Immediate,
and Base-Register-plus Index-Registe -Indirect
Addressing. The first three methods can be used for
addressing destination operands. Most instructions have
a "destination, source" field that specifies the data type,
addressing methods and operands involved. For
operations other than moves, the destination operand is
also a source operand.
Any register in the four 8-Register Banks can be accessed
through Register, Direct, or Register-Indirect Addressing;
the 128 bytes of Internal Data RAM through Direct or
Register-Indirect Addressing; and the Special Function
Registers through Direct Addressing. External Data
Memory is accessed through Register-Indirect
Addressing. Look-Up-Tables resident in Program Memory
can be accessed through Base-Register-plus
Index-Register-Indirect Addressing.
The MV20556 is classified as an 8-bit machine since the
internal ROM, RAM, Special Function Registers,
Arithmetic/Logic Unit and external data bus are each 8 bits
Specifications subject to change without notice, contact your sales representatives for the most recent information.
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PID256** 07/97