MV20556 Datasheet, PDF (12/30 Pages) Mosel Vitelic, Corp – 8 - Bit MCU Mouse Controller

MOSEL VITELIC INC.
Preliminary
Interrupt System (Cont'd)
that occurs fourteen oscillator periods before the end of
the instruction in progress, an interrupt subroutine call
is made. The level-activated input need be low only
during the sampling that occurs fourteen oscillator
periods before the end of the instruction-in-progress
and may remain low during the entire execution of the
service program. However, the input must be raised
before the service program completes to avoid possible
envoking a second interrupt.
MV20556
MSB
LSB
-
-
-
PS PT1 PX1 PT0 PX0
-
IP.7 Reserve for future use.
-
IP.6 Reserve for future use.
-
IP.5 Reserve for future use.
PS
IP.4 Serial Port Priority control bit. Set/cleared by software to specify high/low priority interrupts for Serial
port.
PT1
IP.3 Defines the idle or power down mode interrupt priority level. Set/cleared by software to specify high/low
priority interrupts for timer/counter1.
PX0
IP.2 External interrupt 1 Priority control bit. Set/cleared by software to specify high/low priority interrupts for
INT1.
PT0
IP.1 Defines the timer 0 interrupt priority level. Set/cleared by software to specify high/low priority interrupts
for timer/counter0.
PX1
IP.0 External interrupt 0 Priority control bit. Set/cleared by software to specify high/low priority interrupts for
INT0.
IP definition
Specifications subject to change without notice, contact your sales representatives for the most recent information.
12/27
PID256** 07/97