M38027E8SP Datasheet, PDF (36/51 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
3802 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
ELECTRICAL CHARACTERISTICS (VCC = 3.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Symbol
Parameter
Test conditions
Limits
Unit
Min. Typ. Max.
VOH
“H” output voltage P00–P07, P10–P17, P20–P27,
P30–P37, P40–P47, P50–P57,
P60–P67 (Note 1)
IOH = –10 mA
VCC = 4.0 to 5.5 V
IOH = –1.0 mA
VCC–2.0
VCC–1.0
V
VCC = 3.0 to 5.5 V
VOL
VT+ – VT–
“L” output voltage P00–P07, P10–P17, P20–P27,
P30–P37, P40–P47,P50–P57,
P60–P67
Hysteresis
CNTR0, CNTR1, INT0–INT4
IOL = 10 mA
VCC = 4.0 to 5.5 V
IOL = 1.0 mA
VCC = 3.0 to 5.5 V
2.0
V
1.0
0.4
V
VT+ – VT– Hysteresis
RXD, SCLK1, SIN2, SCLK2
0.5
V
VT+ – VT– Hysteresis
RESET
0.5
V
“H” input current P00–P07, P10–P17, P20–P27,
IIH
P30–P37, P40–P47, P50–P57, VI = VCC
P60–P67
5.0 µA
IIH
“H” input current RESET, CNVSS
IIH
“H” input current XIN
VI = VCC
VI = VCC
5.0 µA
4
µA
“L” input current P00–P07, P10–P17, P20–P27,
IIL
P30–P37, P40–P47, P50–P57, VI = VSS
P60–P67, RESET, CNVSS
–5.0 µA
IIL
IIL
VRAM
“L” input current RESET, CNVSS
“L” input current XIN
RAM hold voltage
VI = VSS
VI = VSS
When clock stopped
–5.0 µA
–4
µA
2.0
5.5
V
f(XIN) = 8 MHz, VCC = 5 V
f(XIN) = 5 MHz, VCC = 5 V
6.4
13
4
8
ICC
Power source current
f(XIN) = 2 MHz, VCC = 3 V
When WIT instruction is executed with
f(Xin) = 8MHz,VCC=5V
When WIT instruction is executed with
f(Xin) = 5MHz,VCC=5V
When WIT instruction is executed with
f(Xin) = 2MHz,VCC=3V
When STP instruction
is executed with clock
stopped, output
transistors isolated.
Ta = 25 °C
(Note 2)
Ta = 85 °C
(Note 2)
0.8
2.0
1.5
mA
1
0.2
0.1
1
µA
10
Note 1: P45 is measured when the P45/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
P51 is measured when the P51/SOUT2 P-channel output disable bit of the serial I/O2 control register (bit 7 of address 001D16) is “0”.
2: With output transistors isolated and A-D converter having completed conversion, and not including current flowing through VREF pin.
A–D CONVERTER CHARACTERISTICS
(VCC = 3.0 to 5.5 V, VSS = AVSS = 0 V, VREF = 2.0 V to VCC, Ta = –20 to 85 °C, unless otherwise noted)
Symbol
Parameter
—
—
tCONV
RLADDER
IVREF
II(AD)
Resolution
Absolute accuracy (excluding quantization error)
Conversion time
Ladder resistor
Reference power source input current (Note)
A-D port input current
Test conditions
VREF = 5.0 V
Min.
50
Limits
Typ.
±1
35
150
0.5
Max.
8
±2.5
50
200
5.0
Unit
Bits
LSB
tC(φ)
kΩ
µA
µA
Note: When D-A conversion registers (addresses 003616 and 003716) contain “0016”.
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