M38027E8SP Datasheet, PDF (31/51 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
3802 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Processor Modes
Single-chip mode, memory expansion mode, and microprocessor
mode can be selected by changing the contents of the processor
mode bits CM0 and CM1 (bits 0 and 1 of address 003B16). In
memory expansion mode and microprocessor mode, memory can
be expanded externally through ports P0 to P3. In these modes,
ports P0 to P3 lose their I/O port functions and become bus pins.
Table 2. Functions of ports in memory expansion mode and
microprocessor mode
Port Name
Function
Port P0
Outputs low-order byte of address.
Port P1
Outputs high-order byte of address.
Port P2
Operates as I/O pins for data D7 to D0
(including instruction codes).
P30 and P31 function only as output pins
(except that the port latch cannot be read).
P32 is the ONW input pin.
Port P3
P33 is the RESETOUT output pin. (Note)
P34 is the φ output pin.
P35 is the SYNC output pin.
P36 is the WR output pin, and P37 is the
RD output pin.
Note: If CNVSS is connected to VSS, the microcomputer goes to
single-chip mode after a reset, so this pin cannot be used
as the RESETOUT output pin.
Single-Chip Mode
Select this mode by resetting the microcomputer with CNVSS con-
nected to VSS.
Memory Expansion Mode
Select this mode by setting the processor mode bits to “01” in soft-
ware with CNVSS connected to VSS. This mode enables external
memory expansion while maintaining the validity of the internal
ROM. Internal ROM will take precedence over external memory if
addresses conflict.
Microprocessor Mode
Select this mode by resetting the microcomputer with CNVSS con-
nected to VCC, or by setting the processor mode bits to “10” in
software with CNVSS connected to VSS. In microprocessor mode,
the internal ROM is no longer valid and external memory must be
used.
000016
000816
004016
SFR area
Internal RAM
reserved area
044016
000016
000816
004016
SFR area
Internal RAM
reserved area
044016
V
YYYY16
Internal ROM
FFFF16
FFFF16
Memory expansion mode
Microprocessor mode
The shaded areas are external memory areas.
V _{: YYYY16 is the start address of internal ROM.}
Fig. 32 Memory maps in various processor modes
b7
b0
CPU mode register
(CPUM : address 003B16)
Processor mode bits
b1 b0
0 0 : Single-chip mode
0 1 : Memory expansion mode
1 0 : Microprocessor mode
1 1 : Not available
Stack page selection bit
0 : 0 page
1 : 1 page
Not used (return “0” when read)
Fig. 33 Structure of CPU mode register
31