MYX4DDR264M16HW Datasheet, PDF (46/51 Pages) –

1Gb DDR2 SDRAM
MYX4DDR264M16HW*
*Advanced information. Subject to change without notice.
being removed in a system RESET condition.
43. ^tISXR is equal to ^tIS and is used for CKE setup time during self refresh exit.
44. ^tCKE (MIN) of three clocks means CKE must be registered on three consecutive positive clock edges.
CKE must remain at the valid input level the entire time it takes to achieve the three clocks of registration.
Thus, after any CKE transition, CKE may not transition from its valid level during the time period of ^tIS + 2
× ^tCK + ^tIH.
45. The half-clock of tAOFD’s 2.5 tCK assumes a 50/50 clock duty cycle. This half-clock value must be
derated by the amount of half-clock duty cycle error. For example, if the clock duty cycle was 47/53,
t_{AOFD would actually be 2.5 - 0.03, or 2.47, for} t_{AOF (MIN) and 2.5 + 0.03, or 2.53, for} t_{AOF (MAX).}
46. ODT turn-on time ^tAON (MIN) is when the device leaves High-Z and ODT resistance begins to turn on.
ODT turnon time ^tAON (MAX) is when the ODT resistance is fully on. Both are measured from ^tAOND.
47. ODT turn-off time ^tAOF (MIN) is when the device starts to turn off ODT resistance. ODT turn off time ^tAOF
(MAX) is when the bus is in High-Z. Both are measured from ^tAOFD.
48. Half-clock output parameters must be derated by the actual ^tERR_5per and ^tJITdty when input clock jitter
is present; this will result in each parameter becoming larger. The parameter ^tAOF (MIN) is required to be
derated by subtracting both ^tERR_5per (MAX) and ^tJITdty (MAX). The parameter ^tAOF (MAX) is required to
be derated by subtracting both ^tERR_5per (MIN) and ^tJITdty (MIN).
49. The -187E maximum limit is 2 × ^tCK + ^tAC (MAX) + 1000 but it will likely be 3 x ^tCK + ^tAC (MAX) + 1000 in
the future.
50. Should use 8 ^tCK for backward compatibility.
51. DRAM devices should be evenly addressed when being accessed. Disproportionate accesses to a
particular row address may result in reduction of the product lifetime.
MYX4DDR264M16HW*
Revision 1.4 - 03/29/2016
46
Form #: CSI-D-685 Document 005