MT47H256M4 Datasheet, PDF (61/131 Pages) Micron Technology – DDR2 SDRAM

1Gb: x4, x8, x16 DDR2 SDRAM
Input Slew Rate Derating
Table 31: DDR2-667/800/1066 ^tDS, ^tDH Derating Values with Differential Strobe
All units are shown in picoseconds
DQ
Slew
Rate
(V/ns)
2.8 V/ns
ΔΔ
t_DS t_DH
2.4 V/ns
ΔΔ
t_DS t_DH
2.0 V/ns
ΔΔ
t_DS t_DH
DQS, DQS# Differential Slew Rate
1.8 V/ns 1.6 V/ns 1.4 V/ns
ΔΔΔΔΔΔ
t_DS t_DH t_DS t_DH t_DS t_DH
2.0 100 63 100 63 100 63 112 75 124 87 136 99
1.5 67 42 67 42 67 42 79 54 91 66 103 78
1.0 0 0 0 0 0 0 12 12 24 24 36 36
0.9 –5 –14 –5 –14 –5 –14 7 –2 19 10 31 22
0.8 –13 –31 –13 –31 –13 –31 –1 –19 11 –7 23 5
0.7 –22 –54 –22 –54 –22 –54 –10 –42 2 –30 14 –18
0.6 –34 –83 –34 –83 –34 –83 –22 –71 –10 –59 2 –47
0.5 –60 –125 –60 –125 –60 –125 –48 –113 –36 –101 –24 –89
0.4 –100 –188 –100 –188 –100 –188 –88 –176 –76 –164 –64 –152
1.2 V/ns
ΔΔ
t_DS t_DH
148 111
115 90
48 48
43 34
35 17
26 –6
14 –35
–12 –77
–52 –140
1.0 V/ns
ΔΔ
t_DS t_DH
160 123
127 102
60 60
55 46
47 29
38 6
26 –23
0 –65
–40 –128
0.8 V/ns
ΔΔ
t_DS t_DH
172 135
139 114
72 72
67 58
59 41
50 18
38 –11
12 –53
–28 –116
Notes:
1. For all input signals the total ^tDS and ^tDH required is calculated by adding the data
sheet value to the derating value listed in Table 31.
2. ^tDS nominal slew rate for a rising signal is defined as the slew rate between the last
crossing of V_REF(DC) and the first crossing of V_IH(AC)min. ^tDS nominal slew rate for a falling
signal is defined as the slew rate between the last crossing of V_REF(DC) and the first cross-
ing of V_IL(AC)max. If the actual signal is always earlier than the nominal slew rate line
between the shaded “V_REF(DC) to AC region,” use the nominal slew rate for the derating
value (see Figure 27 (page 64)). If the actual signal is later than the nominal slew rate
line anywhere between shaded “V_REF(DC) to AC region,” the slew rate of a tangent line
to the actual signal from the AC level to DC level is used for the derating value (see Fig-
ure 28 (page 64)).
3. ^tDH nominal slew rate for a rising signal is defined as the slew rate between the last
crossing of V_IL(DC)max and the first crossing of V_REF(DC). ^tDH nominal slew rate for a falling
signal is defined as the slew rate between the last crossing of V_IH(DC)min and the first cross-
ing of V_REF(DC). If the actual signal is always later than the nominal slew rate line
between the shaded “DC level to V_REF(DC) region,” use the nominal slew rate for the de-
rating value (see Figure 29 (page 65)). If the actual signal is earlier than the nominal
slew rate line anywhere between the shaded “DC to V_REF(DC) region,” the slew rate of a
tangent line to the actual signal from the DC level to V_REF(DC) level is used for the derat-
ing value (see Figure 30 (page 65)).
4. Although the total setup time might be negative for slow slew rates (a valid input signal
will not have reached V_IH[AC]/V_IL[AC] at the time of the rising clock transition), a valid in-
put signal is still required to complete the transition and reach V_IH(AC)/V_IL(AC).
5. For slew rates between the values listed in this table, the derating values may be ob-
tained by linear interpolation.
6. These values are typically not subject to production test. They are verified by design and
characterization.
7. Single-ended DQS requires special derating. The values in Table 32 (page 62) are the
DQS single-ended slew rate derating with DQS referenced at V_REF and DQ referenced at
the logic levels ^tDS_b and ^tDH_b. Converting the derated base values from DQ referenced
to the AC/DC trip points to DQ referenced to V_REF is listed in Table 33 (page 62). Ta-
ble 33 provides the V_REF-based fully derated values for the DQ (^tDS_a and ^tDH_a) for
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1GbDDR2.pdf – Rev. T 02/10 EN
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