MT46V32M8P-5BK Datasheet, PDF (53/91 Pages) Micron Technology – Double Data Rate (DDR) SDRAM

Figure 12: INITIALIZATION Flow Diagram
Step
1
V_DD and V_DDQ ramp
2
Apply V_REF and V_TT
3
CKE must be LVCMOS LOW
4
Apply stable clocks
5
Wait at least 200µs
6
Bring CKE HIGH with a NOP command
7
PRECHARGE ALL
8
Assert NOP or DESELECT for ^tRP time
9
Configure extended mode register
10
Assert NOP or DESELECT for ^tMRD time
11
Configure load mode register and reset DLL
12
Assert NOP or DESELECT for ^tMRD time
13
PRECHARGE ALL
14
Assert NOP or DESELECT for ^tRP time
15
Issue AUTO REFRESH command
16
Assert NOP or DESELECT commands for ^tRFC
17
Issue AUTO REFRESH command
18
Assert NOP or DESELECT for ^tRFC time
19
Optional LMR command to clear DLL bit
20
Assert NOP or DESELECT for ^tMRD time
21
DRAM is ready for any valid command
256Mb: x4, x8, x16 DDR SDRAM
Operations
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 256Mb DDR: Rev. S, Core DDR: Rev. E 9/12 EN
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