MT9VDDT6472HG Datasheet, PDF (5/18 Pages) Micron Technology – DDR SDRAM SODIMM

128MB, 256MB, 512MB (x72, ECC, SR) 200-Pin DDR SODIMM
Pin Assignments and Descriptions
Table 7: Pin Descriptions
Symbol
A[12:0]
BA[1:0]
CK[2:0], CK#[2:0]
CKE0
DM[8:0]
RAS#, CAS#, WE#
S0#
SA[2:0]
SCL
CB[7:0]
DQ[63:0]
DQS[8:0]
SDA
V_DD
V_DDSPD
V_REF
V_SS
NC
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
I/O
I/O
I/O
Supply
Supply
Supply
Supply
–
Description
Address inputs: Provide the row address for ACTIVE commands, and the
column address and auto precharge bit (A10) for READ/WRITE commands, to
select one location out of the memory array in the respective device bank. A10
sampled during a PRECHARGE command determines whether the PRECHARGE
applies to one device bank (A10 LOW, device bank selected by BA[1:0]) or all
device banks (A10 HIGH). The address inputs also provide the op-code during a
MODE REGISTER SET command. BA[1:0] define which mode register (or
extended mode register) is loaded during the LOAD MODE REGISTER
command. A[11:0] (128MB) and A[12:0] (256MB, 512MB).
Bank address: BA[1:0] define the device bank to which an ACTIVE, READ,
WRITE, or PRECHARGE command is being applied.
Clock: CK and CK# are differential clock inputs. All control, command, and
address input signals are sampled on the crossing of the positive edge of CK
and the negative edge of CK#. Output data (DQ and DQS) is referenced to the
crossings of CK and CK#.
Clock enable: CKE enables (registered HIGH) and disables (registered LOW)
the internal clock, input buffers, and output drivers.
Input data mask: DM is an input mask signal for write data. Input data is
masked when DM is sampled HIGH, along with that input data, during a write
access. DM is sampled on both edges of DQS. Although DM pins are input-only,
the DM loading is designed to match that of the DQ and DQS pins.
Command inputs: RAS#, CAS#, and WE# (along with S#) define the command
being entered.
Chip selects: S# enables (registered LOW) and disables (registered HIGH) the
command decoder.
Presence-detect address inputs: These pins are used to configure the
presence-detect device.
Serial clock for presence-detect: SCL is used to synchronize the presence-
detect data transfer to and from the module.
Check bits.
Data input/output: Data bus.
Data strobe: Output with read data. Edge-aligned with read data. Input with
write data. Center-aligned with write data. Used to capture data.
Serial presence-detect data: SDA is a bidirectional pin used to transfer
addresses and data into and out of the presence-detect portion of the module.
Power supply: 2.5V ±0.2V (-40B: 2.6V ±0.1V).
Serial EEPROM positive power supply: 2.3–3.6V.
SSTL_2 reference voltage (V_DD/2).
Ground.
No connect: These pins are not connected on the module.
PDF: 09005aef80804052/Source: 09005aef806e057b
DD9C16_32_64x72H.fm - Rev. F 3/12 EN
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