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MT40A1G8WE-075E Datasheet, PDF (296/358 Pages) Micron Technology – Refresh time of 8192-cycle at TC temperature range
8Gb: x8, x16 Automotive DDR4 SDRAM
Electrical Characteristics – On-Die Termination Characteristics
Table 128: ODT Voltage and Temperature Sensitivity
Parameter
dRTTdT
dRTTdV
Min
0
0
Max
1.5
0.15
Unit
%/°C
%/mV
ODT Timing Definitions
The reference load for ODT timings is different than the reference load used for timing
measurements.
Figure 233: ODT Timing Reference Load
CK_t, CK_c
VDDQ
DUT
DQ, DQS_t, DQS_c,
DM, TDQS_t, TDQS_c
RTT = 50ȍ
VSSQ
Timing reference point
VTT = VSSQ
ODT Timing Definitions and Waveforms
Definitions for tADC, tAONAS, and tAOFAS are provided in the Table 129 (page 296) and
shown in Figure 234 (page 297) and Figure 236 (page 298). Measurement reference set-
tings are provided in the subsequent Table 130 (page 297).
The tADC for the dynamic ODT case and read disable ODT cases are represented by
tADC of Direct ODT Control case.
Table 129: ODT Timing Definitions
Parameter
Begin Point Definition
tADC
Rising edge of CK_t, CK_c defined by the end point of
DODTLoff
Rising edge of CK_t, CK_c defined by the end point of
DODTLon
Rising edge of CK_t, CK_c defined by the end point of
ODTLcnw
Rising edge of CK_t, CK_c defined by the end point of
ODTLcwn4 or ODTLcwn8
tAONAS
Rising edge of CK_t, CK_c with ODT being first registered
HIGH
tAOFAS
Rising edge of CK_t, CK_c with ODT being first registered
LOW
End Point Definition
Extrapolated point at VRTT,nom
Extrapolated point at VSSQ
Extrapolated point at VRTT,nom
Extrapolated point at VSSQ
Extrapolated point at VSSQ
Extrapolated point at VRTT,nom
Figure
Figure 234
(page 297)
Figure 234
(page 297)
Figure 235
(page 298)
Figure 235
(page 298)
Figure 236
(page 298)
Figure 236
(page 298)
CCMTD-1406124318-10419
8gb_auto_ddr4_dram.pdf - Rev. C 3/17 EN
296
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