PC28F512P30EFA Datasheet, PDF (22/92 Pages) Micron Technology – Micron Parallel NOR Flash Embedded Memory (P30-65nm)

512Mb, 1Gb, 2Gb: P30-65nm
Device Command Bus Cycles
Device Command Bus Cycles
Device operations are initiated by writing specific device commands to the command
user interface (CUI). Several commands are used to modify array data including WORD
PROGRAM and BLOCK ERASE commands. Writing either command to the CUI initiates
a sequence of internally timed functions that culminate in the completion of the re-
quested task. However, the operation can be aborted by either asserting RST# or by is-
suing an appropriate suspend command.
Table 7: Command Bus Cycles
Mode
Read
Program
Erase
Suspend
Protection
Configuration
Blank Check
EFI
Command
READ ARRAY
READ DEVICE IDENTIFIER
READ CFI
READ STATUS REGISTER
CLEAR STATUS REGISTER
WORD PROGRAM
BUFFERED PROGRAM³
BUFFERED ENHANCED
FACTORY PROGRAM
(BEFP)⁴
BLOCK ERASE
PROGRAM/ERASE SUSPEND
PROGRAM/ERASE RESUME
BLOCK LOCK
BLOCK UNLOCK
BLOCK LOCK DOWN
PROGRAM OTP REGISTER
PROGRAM LOCK REGISTER
CONFIGURE READ
CONFIGURATION REGISTER
BLOCK BLANK CHECK
EXTENDED FUNCTION
INTERFACE ⁵
Bus
Cycles
1
≥2
≥2
2
1
2
>2
>2
First Bus Cycle
Op Addr¹ Data²
WRITE DnA
0xFF
WRITE DnA
0x90
WRITE DnA
0x98
WRITE DnA
0x70
WRITE DnA
0x50
WRITE WA
0x40
WRITE WA
0xE8
WRITE WA
0x80
2
WRITE BA
1
WRITE DnA
1
WRITE DnA
2
WRITE BA
2
WRITE BA
2
WRITE BA
2
WRITE PRA
2
WRITE LRA
2
WRITE RCD
2
WRITE BA
>2 WRITE WA
0x20
0xB0
0xD0
0x60
0x60
0x60
0xC0
0xC0
0x60
0xBC
0xEB
Second Bus Cycle
Op
Addr¹
Data²
–
–
–
READ DBA + IA
ID
READ DBA + CFI-A
CFI-D
READ
DnA
SRD
–
–
–
WRITE
WA
WD
WRITE
WA
N-1
WRITE
WA
0xD0
WRITE
–
–
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
BA
–
–
BA
BA
BA
OTP-RA
LRA
RCD
0xD0
–
–
0x01
0xD0
0x2F
OTP-D
LRD
0x03
WRITE
BA
D0
Write
WA
Sub-Op code
Notes:
1. First command cycle address should be the same as the operation’s target address. DBA
= Device base address (needed for dual die 512Mb device); DnA = Address within the de-
vice; IA = Identification code address offset; CFI-A = Read CFI address offset; WA = Word
address of memory location to be written; BA = Address within the block; OTP-RA = Pro-
tection register address; LRA = Lock register address; RCD = Read configuration register
data on A[16:1] for Easy BGA and TSOP, A[15:0] for QUAD+ package.
2. ID = Identifier data; CFI-D = CFI data on DQ[15:0]; SRD = Status register data; WD = Word
data; N = Word count of data to be loaded into the write buffer; OTP-D = Protection
register data; LRD = Lock register data.
PDF: 09005aef845667b3
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN
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