DSPIC30F2010_08 Datasheet, PDF (9/204 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

dsPIC30F2010
Table 1-1 provides a brief description of device I/O
pinouts and the functions that may be multiplexed to a
port pin. Multiple functions may exist on one port pin.
When multiplexing occurs, the peripheral module’s
functional requirements may force an override of the
data direction of the port pin.
TABLE 1-1: PINOUT I/O DESCRIPTIONS
Pin Name
Pin
Type
Buffer
Type
Description
AN0-AN5
I
Analog Analog input channels.
AVDD
P
P
Positive supply for analog module.
AVSS
P
P
Ground reference for analog module.
CLKI
CLKO
I ST/CMOS External clock source input. Always associated with OSC1 pin function.
O
— Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes. Always
associated with OSC2 pin function.
CN0-CN7
I
ST Input change notification inputs.
Can be software programmed for internal weak pull-ups on all inputs.
EMUD
EMUC
EMUD1
EMUC1
EMUD2
EMUC2
EMUD3
EMUC3
I/O
ST ICD Primary Communication Channel data input/output pin.
I/O
ST ICD Primary Communication Channel clock input/output pin.
I/O
ST ICD Secondary Communication Channel data input/output pin.
I/O
ST ICD Secondary Communication Channel clock input/output pin.
I/O
ST ICD Tertiary Communication Channel data input/output pin.
I/O
ST ICD Tertiary Communication Channel clock input/output pin.
I/O
ST ICD Quaternary Communication Channel data input/output pin.
I/O
ST ICD Quaternary Communication Channel clock input/output pin.
IC1, IC2, IC7,
I
IC8
ST Capture inputs. The dsPIC30F2010 has four capture inputs. The inputs are
numbered for consistency with the inputs on larger device variants.
INDX
QEA
QEB
I
ST Quadrature Encoder Index Pulse input.
I
ST Quadrature Encoder Phase A input in QEI mode.
Auxiliary Timer External Clock/Gate input in Timer mode.
I
ST Quadrature Encoder Phase A input in QEI mode.
Auxiliary Timer External Clock/Gate input in Timer mode.
INT0
INT1
INT2
I
ST External interrupt 0
I
ST External interrupt 1
I
ST External interrupt 2
FLTA
PWM1L
PWM1H
PWM2L
PWM2H
PWM3L
PWM3H
I
ST PWM Fault A input
O
— PWM 1 Low output
O
— PWM 1 High output
O
— PWM 2 Low output
O
— PWM 2 High output
O
— PWM 3 Low output
O
— PWM 3 High output
MCLR
I/P
ST ^{Master Clear (Reset) input or programming voltage input. This pin is an}
active-low Reset to the device.
OCFA
I
ST Compare Fault A input (for Compare channels 1, 2, 3 and 4).
OC1-OC2
O
— Compare outputs.
OSC1
OSC2
I ST/CMOS Oscillator crystal input. ST buffer when configured in RC mode; CMOS
otherwise.
I/O
— Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator
mode. Optionally functions as CLKO in RC and EC modes.
Legend: CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
I
= Input
Analog = Analog input
O
= Output
P
= Power
© 2008 Microchip Technology Inc.
DS70118H-page 9