PIC16F819T-E Datasheet, PDF (85/176 Pages) Microchip Technology – 18/20-Pin Enhanced Flash Microcontrollers with nanoWatt Technology

PIC16F818/819
The ADRESH:ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is
complete, the result is loaded into the A/D Result register
pair, the GO/DONE bit (ADCON0<2>) is cleared and
A/D Interrupt Flag bit, ADIF, is set. The block diagram of
the A/D module is shown in Figure 11-1.
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as inputs.
To determine sample time, see Section 11.1 “A/D
Acquisition Requirements”. After this sample time
has elapsed, the A/D conversion can be started.
FIGURE 11-1:
A/D BLOCK DIAGRAM
These steps should be followed for doing an A/D
conversion:
1. Configure the A/D module:
• Configure analog pins/voltage reference and
digital I/O (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
2. Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
3. Wait the required acquisition time.
4. Start conversion:
• Set GO/DONE bit (ADCON0)
5. Wait for A/D conversion to complete by either:
• Polling for the GO/DONE bit to be cleared
(with interrupts disabled); OR
• Waiting for the A/D interrupt
6. Read A/D Result register pair
(ADRESH:ADRESL), clear bit ADIF if required.
7. For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as TAD. A minimum wait of 2 TAD is
required before the next acquisition starts.
CHS<3:0>
A/D
Converter
VIN
(Input Voltage)
AVDD
VREF+
(Reference
Voltage)
PCFG<3:0>
100
RA4/AN4/T0CKI
011
RA3/AN3/VREF+
010
RA2/AN2/VREF-
001
RA1/AN1
000
RA0/AN0
VREF-
(Reference
Voltage)
AVSS
PCFG<3:0>
 2003 Microchip Technology Inc.
DS39598D-page 83