PIC16LF877A-I Datasheet, PDF (81/234 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers

PIC16F87XA
9.3.8 SLEEP OPERATION
In Master mode, all module clocks are halted and the
transmission/reception will remain in that state until the
device wakes from Sleep. After the device returns to
normal mode, the module will continue to transmit/
receive data.
In Slave mode, the SPI Transmit/Receive Shift register
operates asynchronously to the device. This allows the
device to be placed in Sleep mode and data to be
shifted into the SPI Transmit/Receive Shift register.
When all 8 bits have been received, the MSSP interrupt
flag bit will be set and if enabled, will wake the device
from Sleep.
9.3.9 EFFECTS OF A RESET
A Reset disables the MSSP module and terminates the
current transfer.
9.3.10 BUS MODE COMPATIBILITY
Table 9-1 shows the compatibility between the
standard SPI modes and the states of the CKP and
CKE control bits.
TABLE 9-1: SPI BUS MODES
Standard SPI Mode
Terminology
Control Bits State
CKP
CKE
0, 0
0, 1
0
1
0
0
1, 0
1
1
1, 1
1
0
There is also a SMP bit which controls when the data is
sampled.
TABLE 9-2: REGISTERS ASSOCIATED WITH SPI OPERATION
Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON
PIR1
PIE1
GIE/
GIEH
PSPIF⁽¹⁾
PSPIE⁽¹⁾
PEIE/
GIEL
ADIF
ADIE
TMR0IE INT0IE
RCIF
RCIE
TXIF
TXIE
RBIE
SSPIF
SSPIE
TMR0IF INT0IF RBIF 0000 000x 0000 000u
CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
TRISC PORTC Data Direction Register
1111 1111 1111 1111
SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx uuuu uuuu
SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000
TRISA
— PORTA Data Direction Register
--11 1111 --11 1111
SSPSTAT SMP CKE D/A
P
S
R/W
UA
BF 0000 0000 0000 0000
Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’.
Shaded cells are not used by the MSSP in SPI mode.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on 28-pin devices; always maintain these bits clear.
 2003 Microchip Technology Inc.
DS39582B-page 79