PIC16LF877A-I Datasheet, PDF (184/234 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers

PIC16F87XA
FIGURE 17-4:
EXTERNAL CLOCK TIMING
Q4
Q1
Q2
Q3
OSC1
CLKO
1
3
3
2
Q4
Q1
4
4
TABLE 17-3: EXTERNAL CLOCK TIMING REQUIREMENTS
Param
No.
Symbol
Characteristic
Min Typ† Max
Units
Conditions
FOSC
External CLKI Frequency
(Note 1)
DC —
DC —
1 MHz XT and RC Osc mode
20 MHz HS Osc mode
DC —
32 kHz LP Osc mode
Oscillator Frequency
(Note 1)
DC —
0.1
—
4 MHz RC Osc mode
4 MHz XT Osc mode
4
—
20 MHz HS Osc mode
5
—
200 kHz LP Osc mode
1
TOSC
External CLKI Period
(Note 1)
1000 —
50
—
—
ns XT and RC Osc mode
—
ns HS Osc mode
5
—
—
µs LP Osc mode
Oscillator Period
(Note 1)
250 —
250 —
—
ns RC Osc mode
1
µs XT Osc mode
100 —
250 ns HS Osc mode
50
—
250 ns HS Osc mode
31.25 —
—
µs LP Osc mode
2
TCY
Instruction Cycle Time
(Note 1)
200 TCY
DC
ns TCY = 4/FOSC
3
TOSL, External Clock in (OSC1) High or 100 —
—
ns XT oscillator
TOSH
Low Time
2.5
—
—
µs LP oscillator
15
—
—
ns HS oscillator
4
TOSR, External Clock in (OSC1) Rise or —
—
25
ns XT oscillator
TOSF
Fall Time
—
—
50
ns LP oscillator
—
—
15
ns HS oscillator
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1:
Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are
based on characterization data for that particular oscillator type, under standard operating conditions, with
the device executing code. Exceeding these specified limits may result in an unstable oscillator operation
and/or higher than expected current consumption. All devices are tested to operate at “min.” values with an
external clock applied to the OSC1/CLKI pin. When an external clock input is used, the “max.” cycle time
limit is “DC” (no clock) for all devices.
DS39582B-page 182
 2003 Microchip Technology Inc.