PIC16F1938 Datasheet, PDF (443/452 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers

PIC16(L)F1938/9
Baud Rates, Asynchronous Modes .................. 303
Formulas ........................................................... 302
High Baud Rate Select (BRGH Bit) .................. 301
Synchronous Master Mode ............................... 310, 314
Associated Registers
Receive..................................................... 313
Transmit.................................................... 311
Reception.......................................................... 312
Transmission .................................................... 310
Synchronous Slave Mode
Associated Registers
Receive..................................................... 315
Transmit.................................................... 314
Reception.......................................................... 315
Transmission .................................................... 314
Extended Instruction Set
ADDFSR ................................................................... 369
F
Fail-Safe Clock Monitor....................................................... 75
Fail-Safe Condition Clearing ....................................... 75
Fail-Safe Detection ..................................................... 75
Fail-Safe Operation..................................................... 75
Reset or Wake-up from Sleep..................................... 75
Firmware Instructions........................................................ 365
Fixed Voltage Reference (FVR)
Associated Registers ................................................ 152
Flash Program Memory .................................................... 111
Erasing...................................................................... 116
Modifying................................................................... 120
Writing....................................................................... 116
FSR Register36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 48, 49
FVRCON (Fixed Voltage Reference Control) Register ..... 152
I
I²C Mode (MSSP)
Acknowledge Sequence Timing................................ 276
Bus Collision
During a Repeated Start Condition ................... 280
During a Stop Condition.................................... 281
Effects of a Reset...................................................... 277
I²C Clock Rate w/BRG.............................................. 283
Master Mode
Operation .......................................................... 268
Reception.......................................................... 274
Start Condition Timing .............................. 270, 271
Transmission .................................................... 272
Multi-Master Communication, Bus Collision and
Arbitration ......................................................... 277
Multi-Master Mode .................................................... 277
Read/Write Bit Information (R/W Bit) ........................ 253
Slave Mode
Transmission .................................................... 258
Sleep Operation ........................................................ 277
Stop Condition Timing............................................... 276
INDF Register36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 48, 49
Indirect Addressing ............................................................. 53
Instruction Format ............................................................. 366
Instruction Set ................................................................... 365
ADDLW ..................................................................... 369
ADDWF..................................................................... 369
ADDWFC .................................................................. 369
ANDLW ..................................................................... 369
ANDWF..................................................................... 369
BRA........................................................................... 370
CALL ......................................................................... 371
CALLW ..................................................................... 371
LSLF ......................................................................... 373
LSRF ........................................................................ 373
MOVF ....................................................................... 373
MOVIW ..................................................................... 374
MOVLB ..................................................................... 374
MOVWI ..................................................................... 375
OPTION.................................................................... 375
RESET...................................................................... 375
SUBWFB .................................................................. 377
TRIS ......................................................................... 378
BCF .......................................................................... 370
BSF........................................................................... 370
BTFSC...................................................................... 370
BTFSS ...................................................................... 370
CALL......................................................................... 371
CLRF ........................................................................ 371
CLRW ....................................................................... 371
CLRWDT .................................................................. 371
COMF ....................................................................... 371
DECF........................................................................ 371
DECFSZ ................................................................... 372
GOTO ....................................................................... 372
INCF ......................................................................... 372
INCFSZ..................................................................... 372
IORLW ...................................................................... 372
IORWF...................................................................... 372
MOVLW .................................................................... 374
MOVWF.................................................................... 374
NOP.......................................................................... 375
RETFIE..................................................................... 376
RETLW ..................................................................... 376
RETURN................................................................... 376
RLF........................................................................... 376
RRF .......................................................................... 377
SLEEP ...................................................................... 377
SUBLW..................................................................... 377
SUBWF..................................................................... 377
SWAPF..................................................................... 378
XORLW .................................................................... 378
XORWF .................................................................... 378
INTCON Register................................................................ 94
Internal Oscillator Block
INTOSC
Specifications ................................................... 395
Internal Sampling Switch (RSS) Impedance ..................... 163
Internet Address ............................................................... 447
Interrupt-On-Change......................................................... 147
Associated Registers................................................ 149
Interrupts ............................................................................ 89
ADC .......................................................................... 158
Associated registers w/ Interrupts ............................ 101
Configuration Word w/ Clock Sources........................ 79
Configuration Word w/ LDO...................................... 103
TMR1........................................................................ 195
INTOSC Specifications ..................................................... 395
IOCBF Register ................................................................ 148
IOCBN Register ................................................................ 148
IOCBP Register ................................................................ 148
L
LATA Register .......................................................... 129, 138
LATB Register .................................................................. 134
LATD Register .................................................................. 141
LATE Register .................................................................. 145
LCD
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Preliminary
DS41574A-page 443