PIC16F1938 Datasheet, PDF (40/452 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers

PIC16(L)F1938/9
TABLE 3-10: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 4
200h⁽²⁾ INDF0
Addressing this location uses contents of FSR0H/FSR0L to Address Data Memory
(not a physical register)
xxxx xxxx xxxx xxxx
201h⁽²⁾ INDF1
Addressing this location uses contents of FSR1H/FSR1L to Address Data Memory
(not a physical register)
xxxx xxxx xxxx xxxx
202h⁽²⁾ PCL
Program Counter (PC) Least Significant Byte
0000 0000 0000 0000
203h⁽²⁾ STATUS
—
—
—
TO
PD
Z
DC
C
---1 1000 ---q quuu
204h⁽²⁾ FSR0L
Indirect Data Memory Address 0 Low Pointer
0000 0000 uuuu uuuu
205h⁽²⁾ FSR0H
Indirect Data Memory Address 0 High Pointer
0000 0000 0000 0000
206h⁽²⁾ FSR1L
Indirect Data Memory Address 1 Low Pointer
0000 0000 uuuu uuuu
207h⁽²⁾ FSR1H
Indirect Data Memory Address 1 High Pointer
0000 0000 0000 0000
208h⁽²⁾ BSR
—
—
—
BSR<4:0>
---0 0000 ---0 0000
209h⁽²⁾ WREG
Working Register
0000 0000 uuuu uuuu
20Ah^{(1, 2)} PCLATH
—
Write Buffer for the upper 7 bits of the Program Counter
-000 0000 -000 0000
20Bh⁽²⁾ INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF 0000 0000 0000 0000
20Ch
—
Unimplemented
—
—
20Dh
WPUB
WPUB7 WPUB6
WPUB5
WPUB4
WPUB3 WPUB2 WPUB1 WPUB0 1111 1111 1111 1111
20Eh
—
Unimplemented
—
—
20Fh
—
Unimplemented
—
—
210h
WPUE
—
—
—
—
WPUE3
—
—
— ---- 1--- ---- 1---
211h
SSPBUF
Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx uuuu uuuu
212h
SSPADD
ADD<7:0>
0000 0000 0000 0000
213h
SSPMSK
MSK<7:0>
1111 1111 1111 1111
214h
SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF 0000 0000 0000 0000
215h
SSPCON1
WCOL
SSPOV
SSPEN
CKP
SSPM<3:0>
0000 0000 0000 0000
216h
SSPCON2
GCEN ACKSTAT ACKDT
ACKEN
RCEN
PEN
RSEN
SEN 0000 0000 0000 0000
217h
SSPCON3
ACKTIM
PCIE
SCIE
BOEN
SDAHT
SBCDE
AHEN
DHEN 0000 0000 0000 0000
218h
—
Unimplemented
—
—
219h
—
Unimplemented
—
—
21Ah
—
Unimplemented
—
—
21Bh
—
Unimplemented
—
—
21Ch
—
Unimplemented
—
—
21Dh
—
Unimplemented
—
—
21Eh
—
Unimplemented
—
—
21Fh
—
Unimplemented
—
—
Legend:
Note 1:
2:
3:
4:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
These registers can be addressed from any bank.
These registers/bits are not implemented on PIC16(L)F1938 devices, read as ‘0’.
Unimplemented, read as ‘1’.
DS41574A-page 40
Preliminary
 2011 Microchip Technology Inc.