DSPIC30F5011_06 Datasheet, PDF (162/224 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

dsPIC30F5011/5013
TABLE 21-2: INSTRUCTION SET OVERVIEW (CONTINUED)
Base
Instr
#
Assembly
Mnemonic
Assembly Syntax
Description
29
DIV
30
DIVF
31
DO
32
ED
DIV.S
DIV.SD
DIV.U
DIV.UD
DIVF
DO
DO
ED
Wm,Wn
Wm,Wn
Wm,Wn
Wm,Wn
Wm,Wn
#lit14,Expr
Wn,Expr
Wm*Wm,Acc,Wx,Wy,Wxd
Signed 16/16-bit Integer Divide
Signed 32/16-bit Integer Divide
Unsigned 16/16-bit Integer Divide
Unsigned 32/16-bit Integer Divide
Signed 16/16-bit Fractional Divide
Do code to PC+Expr, lit14+1 times
Do code to PC+Expr, (Wn)+1 times
Euclidean Distance (no accumulate)
33
EDAC
EDAC Wm*Wm,Acc,Wx,Wy,Wxd
Euclidean Distance
34
EXCH
EXCH Wns,Wnd
35
FBCL
FBCL
Ws,Wnd
36
FF1L
FF1L
Ws,Wnd
37
FF1R
FF1R
Ws,Wnd
38
GOTO
GOTO Expr
GOTO Wn
39
INC
INC
f
INC
f,WREG
INC
Ws,Wd
40
INC2
INC2
f
INC2
f,WREG
INC2
Ws,Wd
41
IOR
IOR
f
IOR
f,WREG
IOR
#lit10,Wn
IOR
Wb,Ws,Wd
IOR
Wb,#lit5,Wd
42
LAC
LAC
Wso,#Slit4,Acc
Swap Wns with Wnd
Find Bit Change from Left (MSb) Side
Find First One from Left (MSb) Side
Find First One from Right (LSb) Side
Go to address
Go to indirect
f=f+1
WREG = f + 1
Wd = Ws + 1
f=f+2
WREG = f + 2
Wd = Ws + 2
f = f .IOR. WREG
WREG = f .IOR. WREG
Wd = lit10 .IOR. Wd
Wd = Wb .IOR. Ws
Wd = Wb .IOR. lit5
Load Accumulator
43
LNK
44
LSR
45
MAC
LNK
LSR
LSR
LSR
LSR
LSR
MAC
MAC
#lit14
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd,
AWB
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd
Link frame pointer
f = Logical Right Shift f
WREG = Logical Right Shift f
Wd = Logical Right Shift Ws
Wnd = Logical Right Shift Wb by Wns
Wnd = Logical Right Shift Wb by lit5
Multiply and Accumulate
Square and Accumulate
46
MOV
MOV
f,Wn
Move f to Wn
MOV
f
Move f to f
MOV
f,WREG
Move f to WREG
MOV
#lit16,Wn
Move 16-bit literal to Wn
MOV.b #lit8,Wn
Move 8-bit literal to Wn
MOV
Wn,f
Move Wn to f
MOV
Wso,Wdo
Move Ws to Wd
MOV
WREG,f
Move WREG to f
MOV.D Wns,Wd
Move Double from W(ns):W(ns+1) to Wd
MOV.D Ws,Wnd
Move Double from Ws to W(nd+1):W(nd)
47
MOVSAC MOVSAC Acc,Wx,Wxd,Wy,Wyd,AWB
Prefetch and store accumulator
# of # of Status Flags
Words Cycles Affected
1
18
N,Z,C,OV
1
18
N,Z,C,OV
1
18
N,Z,C,OV
1
18
N,Z,C,OV
1
18
N,Z,C,OV
2
2
None
2
2
None
1
1
OA,OB,OAB,
SA,SB,SAB
1
1
OA,OB,OAB,
SA,SB,SAB
1
1
None
1
1
C
1
1
C
1
1
C
2
2
None
1
2
None
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
OA,OB,OAB,
SA,SB,SAB
1
1
None
1
1
C,N,OV,Z
1
1
C,N,OV,Z
1
1
C,N,OV,Z
1
1
N,Z
1
1
N,Z
1
1
OA,OB,OAB,
SA,SB,SAB
1
1
OA,OB,OAB,
SA,SB,SAB
1
1
None
1
1
N,Z
1
1
N,Z
1
1
None
1
1
None
1
1
None
1
1
None
1
1
N,Z
1
2
None
1
2
None
1
1
None
DS70116F-page 160
© 2006 Microchip Technology Inc.