PIC24F04KA200 Datasheet, PDF (16/26 Pages) Microchip Technology – Flash Programming Specifications

PIC24FXXKA2XX
TABLE 3-8: PIC24FXXKA2XX FAMILY CONFIGURATION BITS DESCRIPTION (CONTINUED)
Bit Field
Register
Description
FWPSA
FWDT<4>
WDT Prescaler
1 = WDT prescaler ratio of 1:128
0 = WDT prescaler ratio of 1:32
FWDTEN
FWDT<7>
Watchdog Timer Enable bit
1 = WDT is enabled
0 = WDT is disabled (control is placed on the SWDTEN bit)
GSS0
FGS<1>
General Segment Code Flash Code Protection bit
1 = No protection
0 = Standard security is enabled
GWRP
FGS<0>
General Segment Code Flash Write Protection bit
1 = General segment may be written
0 = General segment is write-protected
ICS<1:0>
FICD<1:0>
ICD Pin Placement Select bit
11 = Reserved; do not use
10 = PGEC2/PGED2 are used for ICSP programming
01 = PGEC3/PGED3 are used for ICSP programming
00 = Reserved; do not use
IESO
FOSCSEL<7> Internal External Switchover bit
1 = Internal External Switchover mode is enabled (Two-Speed Start-up
enabled)
0 = Internal External Switchover mode is disabled (Two-Speed Start-up disabled)
MCLRE⁽¹⁾
FPOR<7>
MCLR Pin Enable bit⁽¹⁾
1 = MCLR pin is enabled; RA5 input pin is disabled
0 = RA5 input pin is enabled; MCLR is disabled
OSCIOFNC
FOSC<2>
CLKO Enable Configuration bit
1 = CLKO output signal is active on the OSCO pin; primary oscillator must be
disabled or configured for the External Clock mode (EC) for the CLKO to
be active (POSCMD<1:0> = 11 or 00)
0 = CLKO output is disabled
POSCMD<1:0> FOSC<1:0>
Primary Oscillator Configuration bits
11 = Primary oscillator disabled
10 = HS Oscillator mode selected (4 MHz-25 MHz)
01 = XT Oscillator mode selected (100 kHz-4 MHz)
00 = External Clock mode selected
POSCFREQ<1:0> FOSC<4:3>
Primary Oscillator Frequency Range Configuration bits
11 = Primary oscillator/external clock input frequency is greater than 8 MHz
10 = Primary oscillator/external clock input frequency is between 100 kHz and
8 MHz
01 = Primary oscillator/external clock input frequency is less than 100 kHz
00 = Reserved; do not use
PWRTEN
FPOR<3>
Power-up Timer Enable bit
0 = PWRT is disabled
1 = PWRT is enabled
SOSCSEL
FOSC<5>
Secondary Oscillator Select bit
1 = Secondary oscillator is configured for high-power operation
0 = Secondary oscillator is configured for low-power operation
Note 1: The MCLRE fuse can only be changed when using the VPP-Based Test mode entry. This prevents a user
from accidentally locking out the device from low-voltage test entry.
DS39991A-page 16
 2010 Microchip Technology Inc.