PIC24F04KA200 Datasheet, PDF (10/26 Pages) Microchip Technology – Flash Programming Specifications

PIC24FXXKA2XX
3.6 Writing Code Memory
The procedure for writing code memory is the same as
writing the Configuration registers. The difference is
that the 32 instruction words are programmed one at a
time. To facilitate this operation, working registers,
W0:W5, are used as temporary holding registers for the
data to be programmed. Figure 3-8 illustrates the code
memory writing flow.
Table 3-5 provides the ICSP programming details,
including the serial pattern with the ICSP command
code, which must be transmitted, LSB first, using the
PGCx and PGDx pins (see Figure 3-2).
In Step 1 of Table 3-5, the Reset vector is exited. In
Step 2, the NVMCON register is initialized for
programming a full row of code memory. In Step 3, the
24-bit starting destination address for programming is
loaded into the TBLPAG register and W7 register. The
upper byte of the starting destination address is stored
in TBLPAG and the lower 16 bits of the destination
address are stored in W7.
To minimize the programming time, a packed
instruction format is used (see Figure 3-7).
In Step 4 of Table 3-5, four packed instruction words
are stored in working registers, W0:W5, using the MOV
instruction; the Read Pointer, W6, is initialized.
Figure 3-7 illustrates the contents of W0:W5 holding
the packed instruction word data. In Step 5, eight
TBLWT instructions are used to copy the data from
W0:W5 to the write latches of the code memory. Since
code memory is programmed 32 instruction words at a
time, Steps 3 to 5 are repeated eight times to load all
the write latches (see Step 6).
After the write latches are loaded, initiate programming
by writing to the NVMCON register in Steps 7 and 8. In
Step 9, the internal PC is reset to 200h. This is a
precautionary measure to prevent the PC from
incrementing to unimplemented memory when large
devices are being programmed. Finally, in Step 10,
repeat Steps 3 through 9 until all of the code memory is
programmed.
FIGURE 3-7:
PACKED INSTRUCTION
WORDS IN W0:W5
15
87
0
W0
LSW0
W1
MSB1
MSB0
W2
LSW1
W3
LSW2
W4
MSB3
MSB2
W5
LSW3
TABLE 3-5: SERIAL INSTRUCTION EXECUTION FOR WRITING CODE MEMORY
Command
(Binary)
Data
(Hex)
Description
Step 1: Exit the Reset vector.
0000
0000
0000
000000
040200
000000
NOP
GOTO
NOP
0x200
Step 2: Set the NVMCON to program 32 instruction words.
0000
0000
24004A
MOV
883B0A
MOV
#0x4004, W10
W10, NVMCON
Step 3: Initialize the Write Pointer (W7) for TBLWT instruction.
0000
0000
0000
200xx0
MOV
880190
MOV
2xxxx7
MOV
#<DestinationAddress23:16>, W0
W0, TBLPAG
#<DestinationAddress15:0>, W7
DS39991A-page 10
 2010 Microchip Technology Inc.