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TC1302A_13 Datasheet, PDF (13/26 Pages) Microchip Technology – Low Quiescent Current Dual Output LDO
5.9 TC1302A SHDN2 Timing
VOUT1 will rise independent of the level of SHDN2 for
the TC1302A. Figure 5-1 is used to define the wake-up
time from shutdown (tWK) and the settling time (tS). The
wake-up time is dependant upon the frequency of
operation. The faster the SHDN pin is pulsed, the
shorter the wake-up time will be.
VIN
SHDN2
ts
twk
VOUT1
VOUT2
TC1302A/B
5.11 Device Protection
5.11.1 OVERCURRENT LIMIT
In the event of a faulted output load, the maximum
current the LDO output will permit to flow is limited
internally for each of the TC1302A/B outputs. The peak
current limit for VOUT1 is typically 1.1A, while the peak
current limit for VOUT2 is typically 0.5A. During short-
circuit operation, the average current is limited to
200 mA for VOUT1 and 140 mA for VOUT2.
5.11.2
OVERTEMPERATURE
PROTECTION
If the internal power dissipation within the TC1302A/B
is excessive due to a faulted load or higher-than-
specified line voltage, an internal temperature-sensing
element will prevent the junction temperature from
exceeding approximately 150°C. If the junction
temperature does reach 150°C, both outputs will be
disabled until the junction temperature cools to
approximately 140°C and the device resumes normal
operation. If the internal power dissipation continues to
be excessive, the device will again shut off.
FIGURE 5-1:
TC1302A Timing.
5.10 TC1302B SHDN1/SHDN2 Timing
For the TC1302B, the SHDN1 input pin is used to
control VOUT1. The SHDN2 input pin is used to control
VOUT2, independent of the logic input on SHDN1.
VIN
ts
twk
SHDN1
VOUT1
SHDN2
VOUT2
FIGURE 5-2:
TC1302B Timing.
 2003-2012 Microchip Technology Inc.
DS21333C-page 13