TC1302A_13 Datasheet, PDF (1/26 Pages) Microchip Technology – Low Quiescent Current Dual Output LDO

TC1302A/B
Low Quiescent Current Dual Output LDO
Features
• Dual Output LDO:
- V_OUT1 = 1.5V to 3.3V @ 300 mA
- V_OUT2 = 1.5V to 3.3V @ 150 mA
• Output Voltage (See Table 8-1)
• Low Dropout Voltage:
- V_OUT1 = 104 mV @ 300 mA Typical
- V_OUT2 = 150 mV @ 150 mA Typical
• Low Supply Current: 116 µA Typical
TC1302A/B with both output voltages available
• Reference Bypass Input for Low-Noise Operation
• Both Output Voltages Stable with a Minimum of
1 µF Ceramic Output Capacitor
• Separate V_OUT1 and V_OUT2 SHDN pins
(TC1302B)
• Power-Saving Shutdown Mode of Operation
• Wake-up from SHDN: 5.3 µs. Typical
• Small 8-pin DFN or MSOP Package Options
• Operating Junction Temperature Range:
- -40°C to +125°C
• Overtemperature and Overcurrent Protection
Applications
• Cellular/GSM/PHS Phones
• Battery-Operated Systems
• Hand-Held Medical Instruments
• Portable Computers/PDAs
• Linear Post-Regulators for SMPS
• Pagers
Related Literature
• AN765, “Using Microchip’s Micropower LDOs”,
DS00765, Microchip Technology Inc., 2002
• AN766, “Pin-Compatible CMOS Upgrades to
BiPolar LDOs”, DS00766,
Microchip Technology Inc., 2002
• AN792, “A Method to Determine How Much
Power a SOT23 Can Dissipate in an Application”,
DS00792, Microchip Technology Inc., 2001
Description
The TC1302A/B combines two Low Dropout (LDO)
regulators into a single 8-pin MSOP or DFN package.
Both regulator outputs feature low dropout voltage,
104 mV @ 300 mA for V_OUT1, 150 mV @ 150 mA for
V_OUT2, low quiescent current consumption, 58 µA each
and a typical regulation accuracy of 0.5%. Several
fixed-output voltage combinations are available. A
reference bypass pin is available to further reduce
output noise and improve the power supply rejection
ratio of both LDOs.
The TC1302A/B is stable over all line and load
conditions, with a minimum of 1 µF of ceramic output
capacitance, and utilizes a unique compensation
scheme to provide fast dynamic response to sudden
line voltage and load current changes.
Additional features include an overcurrent limit and
overtemperature protection that combine to provide a
robust design for all load fault conditions.
Package Types
8-Pin DFN/MSOP
DFN8
TC1302A
MSOP8
NC 1
V_OUT1 2
GND 3
Bypass 4
8 NC
NC 1
7 V_IN
V_{OUT1 2}
6 V_OUT2 GND 3
5 SHDN2 Bypass 4
8 NC
7 ^VIN
6 V_OUT2
5 SHDN2
DFN8
TC1302B
MSOP8
NC 1
V_OUT1 2
GND 3
Bypass 4
8 SHDN1 NC 1
7 V_IN
V_OUT1 2
6 V_OUT2 GND 3
5 SHDN2 _Bypass 4
8 SHDN1
7 V_IN
6 V_OUT2
5 SHDN2
 2003-2012 Microchip Technology Inc.
DS21333C-page 1