KSZ8463ML Datasheet, PDF (71/259 Pages) Micrel Semiconductor – IEEE 1588 Precision Time Protocol-Enabled, Three-Port, 10/100-Managed Switch with MII or RMII

Micrel, Inc.
KSZ8463ML/RL/FML/FRL
Global Soft Power-Down Mode
Soft power-down mode is entered by setting bits[1:0] = “10” in PMCTRL register. When the device is in this mode, all PLL
clocks are disabled, the PHYs and the MACs are off, all internal registers value will change to default value, and the CPU
serial interface is only used to wake-up this device from the current soft power-down mode to normal operation mode by
setting bits[1:0] = “00” in the PMCTRL register.
All strap-in pins are sampled to latch any new values when soft power-down is disabled.
Energy-Efficient Ethernet (EEE)
Energy-efficient Ethernet (EEE) is implemented in the KSZ8463ML device as described in the IEEE 802.3AZ specification
for MII operations on Port 1 and Port 2. The EEE function is not available for fiber mode Ports using the KSZ8463FML
and KSZ8463FRL devices. EEE is not performed at Port 3 since that is a MAC to MAC interface and not a MAC to PHY
interface. The internal connection between the MAC and PHY blocks are performed in MII mode. The details of the
implementation are provided in the information that follows. The standards are defined around a MAC that supports
special signaling associated with EEE. EEE saves power by keeping the voltage on the Ethernet cable at approximately
0V for as often as possible during periods of no traffic activity. This is called low-power idle (LPI) state. However, the link
will respond automatically when traffic resumes and do so in such a way as to not cause blocking or dropping of any
packets (the wake-up time for 100BT is specified to be less than 30µs.). The transmit and receive directions are
independently controlled. Note the EEE is not specified or implemented for 10BT. In 10BT, the transmitter is already OFF
during idle periods.
The EEE feature is enabled by default. EEE is auto-negotiated independently for each direction on a link, and is enabled
only if both nodes on a link support it. To disable EEE, clear the Next Page Enable bit(s) for the desired port(s) in the
PCSEEEC register (0x0F3) and restart auto-negotiation.
Based on the EEE specification, the energy savings from EEE occurs at the PHY level. However, the KSZ8463 device
reduces the power consumption not only in the PHY block but also in the MAC and switch blocks by shutting down any
unused clocks as much as possible when the device is at LPI state. A comprehensive LPI request on/off policy is also
built-in at the switch level to determine when to issue LPI requests and when to stop the LPI request. Some software
control options are provided in the device to terminate the LPI request in the early phase when certain events occur to
reduce the latency impact during LPI recovery. A configurable LPI recovery time register is provided at each port to
specify the recovery time (25µs at default) required for the KSZ8463 and its link partner before they are ready to transmit
and receive a packet after going back to the normal state. For details, please refer to the KSZ8463 EEE registers (0x0E0
– 0x0F7) description.
The time during which LPI mode is active is during what is called quiet time. This is shown in Figure 17.
June 11, 2014
Figure 17. Traffic Activity and EEE
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