KSZ8463ML Datasheet, PDF (64/259 Pages) Micrel Semiconductor – IEEE 1588 Precision Time Protocol-Enabled, Three-Port, 10/100-Managed Switch with MII or RMII

Micrel, Inc.
KSZ8463ML/RL/FML/FRL
Using the GPIO Pins with the Timestamp Input Units
The twelve timestamp input units (TSU) can be set up to capture a variety of inputs at user selectable GPIO pins. The
current time of the precision time clock time will be captured and stored at the time in which the input event occurs. This
section provides some information on configuring the timestamp input units. In the information below, the value “x”
represents one of the twelve timestamp input units. Since this area of the device is very flexible and powerful, it is advised
that you contact your Micrel representative for additional information on capturing specific types of waveforms and utilizing
this feature.
Timestamp Value
Each timestamp input nit can capture two sampled values of timestamps. These first two values remain until read, even if
more events occur. The timestamp value captured consists of three parts which are latched in three registers.
Sample #1, the seconds value; TSx_SMPL1_SH, TSx_SMPL1_SL
Sample #1, the nanoseconds value; TSx_SMPL1_NSH, TSx_SMPL1_NSL
Sample #1, the sub-nanoseconds value; TSx_SMPL1_SUB_NS
Sample #2, the seconds value; TSx_SMPL2_SH, TSx_SMPL2_SL
Sample #2, the nanoseconds value; TSx_SMPL2_NSH, TSx_SMPL2_NSL
Sample #2, the sub-nanoseconds value; TSx_SMPL2_SUB_NS
The actual value in TSx_SMPL1/2_SUB_NS is a binary value of 0 through 4 which indicates 0ns, 8ns, 16ns, 24ns, or
32ns. Note that the processor needs to add this value to the seconds and nanoseconds value to get the closest true value
of the timestamp event.
Number of Timestamps Available
Each timestamp input unit can capture two events or two timestamps values. Note that the exception to this is TSU12.
TSU12 can capture eight events and thus has eight sample time registers (SMPL1 thru SMPL8) allowing for more robust
timing acquisition in one TSU. Note that the amount of samples for any given GPIO pin can be increased by cascading
time stamp unit. When TSUs are cascaded, the incoming events are routed to a sequentially established order of TSUs
for capture. For example, you can cascade TSU12, and TSU 1-4 to be able to capture twelve timestamps off of one GPIO
pin. Cascading is set up in the TSx_CFG registers.
Events that can be Captured
The timestamp input units can capture rising edges and falling edges. In this case, the timestamp of the event will be
captured in the Sample #1 timestamp registers. A pulse can be captured if rising edge detection is combined with falling
edge detection. In this case, one edge will be captured in the Sample #1 timestamp registers and the other edge will be
captured in the Sample #2 timestamp registers. This functionality is programmed in the TSx_CFG register for each
timestamp unit.
Timestamping an incoming low-going edge
Specifying the Edge Parameters
TSx_CFG bit[6] = “1”
Associate this Timestamp Unit to a Specific GPIO Pin
TSx_CFG bits[11:8] = Selected GPIO Pin #
Set Up Interrupts if Needed
Set the corresponding timestamp unit interrupt enable bit in the PTP_TS_IE register.
Enabling the Timestamp Unit
Set the corresponding timestamp unit enable bit in the TS_EN register.
Timestamping an incoming high-going edge
June 11, 2014
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Revision 1.0