KSZ8463ML Datasheet, PDF (143/259 Pages) Micrel Semiconductor – IEEE 1588 Precision Time Protocol-Enabled, Three-Port, 10/100-Managed Switch with MII or RMII

Micrel, Inc.
KSZ8463ML/RL/FML/FRL
Port 1 Control Registers
Port 1 Control Register 1 (0x06C – 0x06D): P1CR1
This register contains control bits for the switch Port 1 function.
Bit
Default R/W Description
15
0
RO Reserved
Port 1 LED Direct Control
These bits directly control the port 1 LED pins.
0xx = Normal LED function as set up via Reg. 0x00E – 0x00F, Bits[9:8].
14 - 12
000
R/W _{100 = Both port 1 LEDs off.}
101 = Port 1 LED1 off, LED0 on.
110 = Port 1 LED1 on, LED0 off.
111 = Both port 1 LEDs on.
Source Address Filtering Enable for MAC Address 2
11
0
RW
1 = Enable the source address filtering function when the SA matches MAC
Address 2 in SAFMACA2 (0x0B6 – 0x0BB).
0 = Disable source address filtering function.
Source Address Filtering Enable for MAC Address 1
10
0
RW
1 = Enable the source address filtering function when the SA matches MAC
Address 1 in SAFMACA1 (0x0B0 – 0x0B5).
0 = Disable source address filtering function.
Drop Tagged Packet Enable
9
0
RW 1 = Enable to drop tagged ingress packets.
0 = Disable to drop tagged ingress packets.
TX Two Queues Select Enable
8
0
RW ^{1 = The port 1 output queue is split into two priority queues (q0 and q1).}
0 = Single output queue on port 1. There is no priority differentiation even though
packets are classified into high or low priority.
Broadcast Storm Protection Enable
7
0
RW 1 = Enable broadcast storm protection for ingress packets on port 1.
0 = Disable broadcast storm protection.
Diffserv Priority Classification Enable
6
0
RW 1 = Enable DiffServ priority classification for ingress packets on port 1.
0 = Disable DiffServ function.
802.1p Priority Classification Enable
5
0
RW 1 = Enable 802.1p priority classification for ingress packets on port 1.
0 = Disable 802.1p.
June 11, 2014
143
Revision 1.0