KSZ8463ML Datasheet, PDF (40/259 Pages) Micrel Semiconductor – IEEE 1588 Precision Time Protocol-Enabled, Three-Port, 10/100-Managed Switch with MII or RMII

Micrel, Inc.
KSZ8463ML/RL/FML/FRL
Switch Block
Switching Engine
The KSZ8463 features a high-performance switching engine to move data to and from the MAC’s packet buffers. It
operates in store and forward mode, while the efficient switching mechanism reduces overall latency. The switching
engine has a 32KByte internal frame buffer. This resource is shared between all the ports. There are a total of 256 buffers
available. Each buffer is sized at 128 Bytes.
Spanning Tree Support
To support spanning tree, the host port is the designated port for the processor. The other ports (port 1 and port 2) can be
configured in one of the five spanning tree states via “transmit enable”, “receive enable” and “learning disable” register
settings in registers P1CR2 and P2CR2 for ports 1 and 2, respectively. Table 2 shows the setting and software actions
taken for each of the five spanning tree states.
Table 2. Spanning Tree States
Disable State
Port Setting
The port should not
forward or receive any
packets. Learning is
disabled.
xmit enable = “0”, receive
enable = “0”, learning disable
= “1”
Blocking State
Port Setting
Only packets to the
processor are
forwarded.
xmit enable = “0”, receive
enable = “0”, learning disable
= “1”
Listening State
Port Setting
Only packets to and
from the processor
are forwarded.
Learning is disabled.
xmit enable = “0”, receive
enable = “0”, learning disable
= “1”
Learning State
Port Setting
Only packets to and
from the processor
are forwarded.
Learning is enabled.
xmit enable = “0”, receive
enable = “0”, learning disable
= “0”
Forwarding State
Port Setting
Packets are forwarded
and received
normally. Learning is
enabled.
xmit enable = “1”, receive
enable = “1”, learning disable
= “0”
Software Action
The processor should not send any packets to the port. The switch may
still send specific packets to the processor (packets that match some
entries in the “Static MAC Table” with “overriding bit” set) and the
processor should discard those packets. Address learning is disabled on
the port in this state.
Software Action
The processor should not send any packets to the port(s) in this state. The
processor should program the “Static MAC Table” with the entries that it
needs to receive (for example, BPDU packets). The “overriding” bit should
also be set so that the switch will forward those specific packets to the
processor. Address learning is disabled on the port in this state.
Software Action
The processor should program the “Static MAC Table” with the entries that
it needs to receive (for example, BPDU packets). The “overriding” bit
should be set so that the switch will forward those specific packets to the
processor. The processor may send packets to the port(s) in this state.
Address learning is disabled on the port in this state.
Software Action
The processor should program the “Static MAC Table” with the entries that
it needs to receive (for example, BPDU packets). The “overriding” bit
should be set so that the switch will forward those specific packets to the
processor. The processor may send packets to the port(s) in this state.
Address learning is enabled on the port in this state.
Software Action
The processor programs the “Static MAC Table” with the entries that it
needs to receive (for example, BPDU packets). The “overriding” bit is set
so that the switch forwards those specific packets to the processor. The
processor can send packets to the port(s) in this state. Address learning is
enabled on the port in this state.
June 11, 2014
40
Revision 1.0