KSZ8463ML Datasheet, PDF (48/259 Pages) Micrel Semiconductor – IEEE 1588 Precision Time Protocol-Enabled, Three-Port, 10/100-Managed Switch with MII or RMII

Micrel, Inc.
KSZ8463ML/RL/FML/FRL
IEEE 1588 PTP Clock Types
The KSZ8463 supports the following clock types:
• Ordinary Clock (OC) is defined as a PTP clock with a single PTP port in a PTP domain. It may serve as a source of
time such as a master clock, or it may be a slave clock which synchronizes to another master clock.
• End-to-End Transparent Clock (E2E TC) is defined as a transparent clock that supports the use of the end-to-end delay
measurement mechanism between a slave clock and the master clock. In this method, the E2E TC intermediate
devices do not need to be synchronized to the master clock and the end slave node is directly synchronized to the
master clock. The E2E TC/SC slave intermediate devices can also be synchronized to the master clock. Note that the
transparent clock is not a real clock that can be viewed on an oscilloscope but rather it is a mechanism by which delay
are accounted for when transporting information across and through physical network nodes.
• Peer-to-Peer Transparent Clock (P2P TC for Version 2) is defined as a transparent clock, in addition to providing PTP
event transit time information. P2P TC also provides corrections for the propagation delay between nodes (link
partners) by using Pdelay_Req (Peer Delay Request) and Pdelay_Resp (Peer Delay Response). In this method, the
P2P TC intermediate devices can be synchronized to the master clock. A transparent clock (TC) is not part of the
master-slave hierarchy. Instead, it measures the resident time which is the time taken for a PTP message to traverse
the node. The P2P TC then provides this information to the clock receiving the PTP message. In addition, the P2P TC
measures and passes on the link delay of the receiving PTP message. Note that the transparent clock is not a real
clock that can be viewed on an oscilloscope but rather it is a mechanism by which delay are accounted for when
transporting information across and through physical network nodes.
• Master clock is defined as a clock which is used as the reference clock for the entire system. The KSZ8463 can
operate as a master clock if needed. However, the quality of the clock signal will be limited by the quality of the crystal
or oscillator used to clock the device.
Note: P2P and E2E TCs cannot be mixed on the same communication path.
IEEE 1588 PTP One-Step or Two-Step Clock Operation
The KSZ8463 supports either 1-step or 2-step clock operation.
• One-Step Clock Operation: A PTP message (Sync) exchange that provides time information using a single event
message which eliminates the need for a Follow_Up message to be sent. This one-step operation will eliminate the
need for software to read the timestamp and to send a Follow_Up message.
• Two-Step Clock Operation: A PTP messages (Sync/Follow_Up) that provides time information using the combination of
an event message and a subsequent general message. The Follow_Up message carries a precise estimate of the time
the sync message was placed on the PTP communication path by the sending node.
IEEE 1588 PTP Best Master Clock Selection
The IEEE 1588 PTP specification defines an algorithm based on the characteristics of the clocks and system topology
called best master clock (BMC) algorithm. BMC uses announce messages to establish the synchronization hierarchy. The
algorithm compares data from two clocks to determine the better clock. Each clock device continuously monitors the
announce messages issued by the current master and compares the dataset to itself. The software controls this process.
IEEE 1588 PTP System Time Clock
The system time clock (STC) in KSZ8463 is a readable or writable time source for all IEEE 1588 PTP-related functions
and contains three counters: a 32-bit counter for seconds, a 30-bit counter for nanoseconds and a 32-bit counter for sub-
nanoseconds (units of 2^-32ns). Figure 9 shows the PTP Clock.
June 11, 2014
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