KSZ8441HL Datasheet, PDF (48/194 Pages) Micrel Semiconductor – IEEE 1588v2, Precision Time Protocol-Enabled, 10/100Mbs, Ethernet End-Point Connection with 8- or 16-Bit Host Bus Interface

Micrel, Inc.
KSZ8441HL/FHL
General Purpose and IEEE 1588 Input/Output (GPIO)
Overview
The KSZ8441 incorporate a set of general purpose input/output (GPIO) pins that are configurable to meet the needs of
many applications. The input and output signals on the GPIO pins can be directly controlled via a local processor or they
can be set up to work closely with the IEEE 1588 protocol to create and/or monitor precisely timed signals which are
synchronous to the Precision Time Clock. Some GPIO pins are dedicated while others are dual function pins. Dual
function pins are managed by the IOMXSEL register. Table 9 provides a convenient summary of available GPIO
resources in the KSZ8441.
Table 9. KSZ8441 GPIO Pin Resources
KSZ8441
GPIO
Pin Number
Function
GPIO_0
48
GPIO0
GPIO_1
49
GPIO1
GPIO_2
52
GPIO2
GPIO_3
53
EESK (default) / GPIO3
GPIO_4
54
EEDIO (default) / GPIO4
GPIO_5
55
EECS (default) / GPIO5
GPIO_6
58
GPIO6
GPIO Pin Functionality Control
The GPIO_OEN register is used to configure each GPIO as an input or an output. Each GPIO pin has a set of registers
associated with it that are configured to determine its functionality, and any relationship it has with other GPIO pins or
registers. Each GPIO pin can be configured to output a binary signal state or a serial sequence of bits. Each GPIO pin can
output a single serial bit pattern or it can be programmed to continuously loop and output the pattern until stopped. The
duration of the high and low periods within the sequential bit patterns can be programmed to meet the requirements of the
application. The output can be triggered to occur at any time by the local processor writing to the correct register or it can
be triggered by the local IEEE Precision Timing Protocol Clock being equal to an exact time. The local processor can
interrogate any GPIO pin at any time or the value of the IEEE precision Time Protocol Clock can be captured and
recorded when the specified event occurs on any of the GPIO pins. The control and output of the GPIO pins can be
cascaded to create complex digital output sequences and waveforms. Lastly, the units can be programmed to generate
an interrupt on specific conditions.
The control structure for the eleven pins are organized into two separate units called the trigger output units (TOU) and
the timestamp input units (TSU). There are twelve TOUs and twelve TSUs which can be used with any of the GPIO pins.
There are 32 control bytes for each of the two units to control the functionality. The depth of control is summarized in
Table 10.
June 17, 2014
48
Revision 1.0