KSZ8441HL Datasheet, PDF (24/194 Pages) Micrel Semiconductor – IEEE 1588v2, Precision Time Protocol-Enabled, 10/100Mbs, Ethernet End-Point Connection with 8- or 16-Bit Host Bus Interface

Micrel, Inc.
KSZ8441HL/FHL
Strapping Options
Pin Number Pin Name Type Pin Function
EEPROM Select During Power−Up / Reset:
46
PME/
EEPROM
Pull-up = EEPROM present
IPD/O
NC or Pull-down (default) = EEPROM not present
This pin value is latched into register CCR, bit[9] at the end of the power on/reset time.
Mode of Operation During Power-Up / Reset:
59
P1LED1 IPU/O NC or Pull-Up (default) = Normal Operation
Pull-Down = Reserved
8 or 16-Bit Bus Mode Select During Power−Up / Reset:
NC or Pull-up (default) = 16-bit bus mode
60
P1LED0/
H816
IPU/O _{Pull-down = 8-bit bus mode}
This pin value is also latched into register CCR, bit [7:6] at the end of the Power On/Reset
time.
Endian Mode Select During Power-Up / Reset:
NC or Pull-up (default) = Little Endian
62
LEBE
IPU/O _{Pull-down = Big Endian}
This pin value is latched into register CCR, bit[10] at the end of the Power On/Reset time.
Note: This pin will be driven low at all times other than when it is interrogated at Strap In time.
Note: Ipu/O = Input with internal pull-up (58K ±30%) during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down (58K ±30%) during power-up/reset; output pin otherwise.
All strap-in pins are latched during power-up or reset as well as re-strap-in when hardware/software power down and hardware reset.
June 17, 2014
24
Revision 1.0