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KSZ8441HL Datasheet, PDF (19/194 Pages) Micrel Semiconductor – IEEE 1588v2, Precision Time Protocol-Enabled, 10/100Mbs, Ethernet End-Point Connection with 8- or 16-Bit Host Bus Interface
Micrel, Inc.
KSZ8441HL/FHL
Pin Description (Continued)
Pin Number
24
25
26
27
28
29
30
31
32
33
34
35
36
37
Pin Name
SD13/BE1
SD12/BE0
SD11
SD10/A10
SD9/A9
DGND
VDD_IO
SD8/A8
SD7/A7
SD6/A6
SD5/A5
SD4/A4
SD3/A3
SD2/A2
Type
I/O (PD)
I/O (PD)
I/O (PD)
I/O (PD)
I/O (PD)
GND
P
IPU/O
IPD/O
IPU/O
IPU/O
IPD/O
I/O (PD)
I/O (PD)
Pin Function
Shared Data Bus Bit [13] or BE1
This is data bit (D13) access when CMD = “0”. This is Byte Enable 1 (BE1, 2nd byte
enable and active high) at double-word boundary access in 16−bit bus mode when
CMD = “1”. This pin must be tied to GND in 8-bit bus mode.
Shared Data Bus Bit [12] or BE0
This is data bit (D12) access when CMD = “0”. This is Byte Enable 0 (BE0, 1st byte
enable and active high) at double-word boundary access in 16-bit bus mode when
CMD = “1”. This pin must be tied to GND in 8-bit bus mode.
Shared Data Bus Bit [11]
This is data bit (D11) access when CMD = “0”. Don’t care when CMD = “1”. This pin
must be tied to GND in 8-bit bus mode.
Shared Data Bus bit [10]
This is data bit (D10) access when CMD = “0”. In 8-bit bus mode, this pin must be tied
to GND. In 16-bit bus mode, this is address A10 access when CMD = “1”.
Shared Data Bus Bit-[ 9] or A9
This is data bit (D9) access when CMD = “0”. In 8-bit bus mode, this pin must be tied
to GND. In 16-0bit bus mode, this is address A9 access when CMD = “1”.
Digital Ground.
3.3V, 2.5V or 1.8V digital VDD input power pin for IO logic and the internal low voltage
regulator.
Shared Data Bus Bit[8] or A8
This is data bit (D8) access when CMD = “0”. In 8-bit bus mode, this pin must be tied
to GND. In 16-bit bus mode, this is address A8 access when CMD = “1”.
Shared Data Bus Bit[7] or A7
This is data bit (D7) access when CMD = “0”. In 8-bit bus mode, this is address A7 (1st
write) or Don’t care (2nd write) access when CMD = “1”. In 16-bit bus mode, this is
address A7 access when CMD = “1”.
Shared Data Bus Bit[6] or A6
This is data bit (D6) access when CMD = “0”. In 8-bit bus mode, this is address A6 (1st
write) or Don’t care (2nd write) access when CMD = “1”. In 16-bit bus mode, this is
address A6 access when CMD = “1”.
Shared Data Bus Bit[5] or A5
This is data bit (D5) access when CMD = “0”. In 8-bit bus mode, this is address A5 (1st
write) or Don’t care (2nd write) access when CMD = “1”. In 16-bit bus mode, this is
address A5 access when CMD = “1”.
Shared Data Bus Bit[4] or A4
This is data bit (D4) access when CMD = “0”. In 8-bit bus mode, this is address A4 (1st
write) or Don’t care (2nd write) access when CMD = “1”. In 16-bit bus mode, this is
address A4 access when CMD = “1”.
Shared Data Bus Bit[3] or A3
This is data bit (D3) access when CMD = “0”. In 8-bit bus mode, this is address A3 (1st
write) or Don’t care (2nd write) access when CMD = “1”. In 16-bit bus mode, this is
address A3 access when CMD = “1”.
Shared Data Bus Bit[2] or A2
This is data bit (D2) access when CMD = “0”. In 8-bit bus mode, this is address A2 (1st
write) or A10 (2nd write) access when CMD = “1”. In 16-bit bus mode, this is address
A2 access when CMD = “1”.
June 17, 2014
19
Revision 1.0