DS80C400_09 Datasheet, PDF (97/97 Pages) Maxim Integrated Products – Network Microcontroller

DS80C400 Network Microcontroller
REVISION HISTORY
REVISION
NUMBER
0
REVISION
DATE
111202
New product release.
DESCRIPTION
Replaced “DS2502U-E48” with “DS2502-E48.”
MOVX Characteristics (Nonmultiplexed Address/Data Bus) table: Moved MIN
spec for t_PXIZ to MAX column.
1
060203 _{Added note for connecting the PHY to the DS80C400: “When connecting the}
DS80C400 to an external PHY, do not connect the RSTOL to the reset of the
PHY. Doing so may disable the Ethernet transmit.”
Updated Figure 12: ROM Code Boot Sequence flowchart.
Corrected PSEN signal in the “Nonmultiplexed, 2-Cycle Data Memory CE0-7
2
102103 ^{Write” timing diagram.}
Corrected PT2/PT3 references in Table 21 and Table 28.
Clarified where appropriate the operation of the device when ROM is disabled;
clarified the system requirements when using TINI ROM firmware.
3
111704 _{Modified Figure 12: ROM Code Boot Sequence to better explain action of the}
DS80C400 when it is searching for ROM code.
High-Speed Microcontroller User’s Guide: DS80C400 Supplement was changed
to High-Speed Microcontroller User’s Guide: Network Microcontroller
Supplement in all instances.
PAGES
CHANGED
—
69, 72
14
29, 49, 60,
94
70
18
82, 90
33, 40, 41,
42, 47, 51,
52, 69, 71,
73, 74, 75,
79
70
1, 34, 72, 75,
78, 79, 80,
85, 87
4
060805 Added lead-free part to Ordering Information table.
Added notes explaining that the system clock must be > 25MHz to support
Ethernet 100Mbps mode.
5
010907
Corrected BCUD SFR address in Buffer Control Unit section.
Updated package drawing.
In the Pin Description, replaced the Port 4 description to match the SFR
description in the High-Speed Microcontroller User’s Guide: Network
6
061908 Microcontroller Supplement.
Updated Figure 12 to clarify operation when no user code was found.
1
49, 69
50
97
30
70
7
6/09
Corrected the SEL (DPS.3) bit reset state from 1 to 0 in Table 2.
38
97 of 97
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