DS4830_13 Datasheet, PDF (7/30 Pages) Maxim Integrated Products – Optical Microcontroller

DS4830
Optical Microcontroller
3-Wire Digital Interface Specification
(V_DD = 2.97V to 3.63V, T_A = -40NC to +85NC, unless otherwise noted.) (See Figure 2.)
PARAMETER
MCL Clock Frequency
MCL Duty Cycle
MDIO Setup Time
MDIO Hold Time
MCS Pulse-Width Low
MCS Leading Time Before the
First MCL Edge
SYMBOL
f_SCLOUT
t_3WDC
t_DS
t_DH
t_CSW
t_L
CONDITIONS
MCS Trailing Time After the Last
MCL Edge
t_T
MDIO, MCL Load
C_B3W Total bus capacitance on one line
MIN TYP MAX UNITS
1000
kHz
50
%
100
ns
100
ns
500
ns
500
ns
500
ns
10
pF
SPI Digital Interface Specification
(V_DD = 2.97V to 3.63V, T_A = -40NC to +85NC, unless otherwise noted.) (See Figure 3 and Figure 4.)
PARAMETER
SYMBOL
CONDITIONS
SPI Master Operating Frequency 1/t_MSPICK
SPI Slave Operating Frequency 1/t_SSPICK
SPI I/O Rise/Fall Time
t_{SPI_RF} C_L = 15pF, pullup = 560I
MSPICK Output Pulse-Width
High/Low
t_{MCH, tMCL}
MSPIDO Output Hold After
MSPICK Sample Edge
t_MOH
MSPIDO Output Valid to
MSPICK Sample Edge (MSPIDO
Setup)
t_MOV
MSPIDI Input Valid to MSPICK
Sample Edge (MSPIDI Setup)
t_MIS
MIN
TYP
t_MSPICK/2
- t_{SPI_RF}
t_MSPICK/2
- t_{SPI_RF}
t_MSPICK/2
- t_{SPI_RF}
2t_{SPI_RF}
MSPIDI Input to MSPICK Sample
Edge Rise/Fall Hold
t_MIH
0
MSPICK Inactive to MSPIDO
Inactive
SSPICK Input Pulse-Width High/
Low
t_MLH
t_SCH, t_SCL
t_MSPICK/2
- t_{SPI_RF}
t_SSPICK/2
MAX
f_SYS/2
f_SYS/4
25
SSPICS Active to First Shift
Edge
t_SSE
t_{SPI_RF}
SSPIDI Input to SSPICK Sample
Edge Rise/Fall Setup
t_SIS
SSPIDI Input from SSPICK
Sample Edge Transition Hold
t_SIH
t_{SPI_RF}
t_{SPI_RF}
UNITS
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Maxim Integrated
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