MAX1459 Datasheet, PDF (6/24 Pages) Maxim Integrated Products – 2-Wire, 4-20mA Smart Signal Conditioner

2-Wire, 4–20mA
Smart Signal Conditioner
_______________Detailed Description
The MAX1459 provides an analog amplification path for
the sensor signal and a digital path for calibration and
temperature correction. Calibration and correction is
achieved by varying the offset and gain of a program-
mable-gain amplifier (PGA) and by varying the sensor
bridge current. The PGA utilizes a switched-capacitor
CMOS technology, with an input-referred offset trim-
ming range of ±63mV (9mV steps). An additional out-
put-referred fine offset trim is provided by the offset
DAC (approximately 2.8mV steps). The PGA provides
eight gain values from +41V/V to +230V/V. The bridge
current source is programmable from 0.1mA to 2mA.
The MAX1459 uses four 12-bit DACs with calibration
coefficients stored by the user in an internal 128-bit
EEPROM. This memory contains the following informa-
tion as 12-bit-wide words:
• Configuration register
• Offset calibration coefficient
• Offset temperature error compensation coefficient
• Full-span output (FSO) calibration coefficient
• FSO temperature error compensation coefficient
• 24 user-defined bits for customer programming of
manufacturing data (e.g., serial number and date)
Figure 1 shows a typical pressure-sensor output and
defines the offset, full-scale, and FSO values as a func-
tion of voltage.
FSOTC Compensation
Silicon piezoresistive transducers (PRTs) exhibit a large
positive input resistance tempco (TCR) so that, while
under constant current excitation, the bridge voltage
(V_BDRIVE) increases with temperature. This depen-
dence of V_BDRIVE on the sensor temperature can be
used to compensate the sensor temperature errors.
PRTs also have a large negative full-span output sensi-
tivity tempco (TCS) so that, with constant voltage exci-
tation, FSO will decrease with temperature, causing a
full-span output temperature coefficient (FSOTC) error.
However, if the bridge voltage can be made to increase
with temperature at the same rate that TCS decreases
with temperature, the FSO will remain constant.
FSOTC compensation is accomplished by resistor
R_FTC and the FSOTC DAC, which modulate the excita-
tion reference current at ISRC as a function of tempera-
ture (Figure 2). FSO DAC sets V_ISRC and remains
constant with temperature while the voltage at FSOTC
varies with temperature. FSOTC is the buffered output
of the FSOTC DAC. The reference DAC voltage is
V_BDRIVE, which is temperature dependent. The FSOTC
4.5
FULL-SPAN OUTPUT (FSO)
0.5
OFFSET
P_MIN
FULL-SCALE (FS)
P_MAX
PRESSURE
Figure 1. Typical Pressure-Sensor Output
DAC alters the tempco of the current source. When the
tempco of the bridge voltage is equal in magnitude and
opposite in polarity to the TCS, the FSOTC errors are
compensated and FSO will be constant with tempera-
ture.
OFFSET TC Compensation
Compensating offset TC errors involves first measuring
the uncompensated offset TC error, then determining
what percentage of the temperature-dependent voltage
V_BDRIVE must be added to the output summing junction
to correct the error. Use the offset TC DAC to adjust the
amount of BDRIVE voltage that is added to the output
summing junction (Figure 3).
Analog Signal Path
The fully differential analog signal path consists of four
stages:
• Front-end summing junction for coarse offset correction
• 3-bit PGA with eight selectable gains ranging from
41 through 230
• Three-input-channel summing junction
• Differential to single-ended output buffer with rail-to-
rail output (Figure 3)
Coarse Offset Correction
The sensor output is first fed into a differential summing
junction (INM (negative input) and INP (positive input))
with a CMRR > 90dB, an input impedance of approxi-
mately 1MΩ, and a common-mode input voltage range
from V_SS to V_DD. At this summing junction, a coarse off-
set-correction voltage is added, and the resultant volt-
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