MAX11661 Datasheet, PDF (6/28 Pages) Maxim Integrated Products – 500ksps, Low-Power, Serial 12-/10-/8-Bit ADCs

500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
ELECTRICAL CHARACTERISTICS (MAX11665) (continued)
(VDD = 2.2V to 3.6V, fSCLK = 8MHz, 50% duty cycle, 500ksps, CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical
values are at T_A = +25NC.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Positive Supply Current (Full-
Power Mode), No Clock
I_VDD
1.48
mA
Power-Down Current
I_PD
Line Rejection
TIMING CHARACTERISTICS (Note 1)
Quiet Time
tQ
CS Pulse Width
t1
CS Fall to SCLK Setup
t2
CS Falling Until DOUT High-
Impedance Disabled
t₃
Leakage only
VDD = 2.2V to 3.6V
(Note 2)
1.3
10
FA
0.7
LSB/V
4
ns
10
ns
5
ns
1
ns
Data Access Time After SCLK
Falling Edge
t₄
Figure 2, VDD = 2.2V to 3.6V
15
ns
SCLK Pulse Width Low
SCLK Pulse Width High
Data Hold Time From SCLK
Falling Edge
t₅
Percentage of clock period
t6
Percentage of clock period
t₇
Figure 3
40
60
%
40
60
%
5
ns
SCLK Falling Until DOUT High
Impedance
t₈
Figure 4 (Note 2)
2.5
14
ns
Power-Up Time
Conversion cycle
1
Cycle
ELECTRICAL CHARACTERISTICS (MAX11664)
(VDD = 2.2V to 3.6V, VREF = VDD, VOVDD = VDD, fSCLK = 8MHz, 50% duty cycle, 500ksps; CDOUT = 10pF, TA = -40NC to +125NC,
unless otherwise noted. Typical values are at T_A = +25NC.)
PARAMETER
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Total Unadjusted Error
SYMBOL
CONDITIONS
INL
DNL
OE
GE
TUE
No missing codes
Excluding offset and reference errors
MIN TYP MAX UNITS
10
Bits
Q0.4 LSB
Q0.4 LSB
Q0.5 Q1
LSB
0
Q1
LSB
Q0.5
LSB
Channel-to-Channel Offset
Matching
Q0.05
LSB
Channel-to-Channel Gain
Matching
Q0.05
LSB
DYNAMIC PERFORMANCE (fAIN = 250kHz)
Signal-to-Noise and Distortion
SINAD
Signal-to-Noise Ratio
SNR
Total Harmonic Distortion
THD
Spurious-Free Dynamic Range
SFDR
61
61.8
dB
61
61.8
dB
-83
-74
dB
75
dB
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